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ISL6271AEVAL1 データシート - Intersil

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ISL6271AEVAL1

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Intersil
Intersil Intersil

READ ALL INSTRUCTIONS BEFORE APPLYING POWER OR CONNECTING CABLES

The ISL6271A is a power management integrated circuit (PMIC) designed to provide the low-voltage requirements for the Bulverde XScale processor. There are three(3) such voltages generated by the PMIC:
1) .85V-1.6V core voltage under DVM or VID control
2) 1.3V PLL voltage, and
3) 1.1V SRAM voltage.

All three outputs are enabled/disabled simultaneously by a common Power Enable (EN) signal from the processor.
Various control and diagnostic functions attend to the orderly sequencing and dynamic control of the PMIC. A complete functional description of the PMIC can be found in the ISL6271A data sheet (provided).

Test Equipment Required:
◾ Multi-channel Storage Oscilloscope (with appropriate probes)
◾ Digital Multi-meters (up to 3)
◾ Dual Low-Voltage Adjustable Power Supply
◾ Load - electronic or resistors (0-1A)
◾ PC with available USB port
◾ USB cable
◾ USB/I2C interface module and I2C cable (provided with eval kit)
◾ USB/I2C Software (downloadable from www.intersil.com)

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