VT82C596 データシートの表示（PDF） - Unspecified

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VT82C596

PCI INTEGRATED PERIPHERAL CONTROLLER

Unspecified 

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VT82C596B

Signal Name

PDRDY /

PDDMARDY# /

PDSTROBE

SDRDY /

SDDMARDY# /

SDSTROBE

PDIOR# /

PHDMARDY# /

PHSTROBE

SDIOR# /

SHDMARDY# /

SHSTROBE

PDIOW# /

PSTOP

SDIOW# /

SSTOP

PDDRQ

SDDRQ

PDDACK#

SDDACK#

Pin #

G20

D16

F17

C16

F16

B16

F18

A16

G19

A17

UltraDMA-33 / 66 Enhanced IDE Interface

I/O Signal Description

I EIDE Mode:

Primary I/O Channel Ready. Device ready indicator

UltraDMA Mode: Primary Device DMA Ready. Output flow control. The device

may assert PDDMARDY# to pause output transfers

Primary Device Strobe. Input data strobe (both edges). The

device may stop PDSTROBE to pause input data transfers

I EIDE Mode:

Secondary I/O Channel Ready. Device ready indicator

UltraDMA Mode: Secondary Device DMA Ready. Output flow control. The

device may assert SDDMARDY# to pause output transfers

Secondary Device Strobe. Input data strobe (both edges). The

device may stop SDSTROBE to pause input data transfers

O EIDE Mode:

Primary Device I/O Read. Device read strobe

UltraDMA Mode: Primary Host DMA Ready. Primary channel input flow control.

The host may assert PHDMARDY# to pause input transfers

Primary Host Strobe. Output data strobe (both edges). The

host may stop PHSTROBE to pause output data transfers

O EIDE Mode:

Secondary Device I/O Read. Device read strobe

UltraDMA Mode: Secondary Host DMA Ready. Input flow control. The host

may assert SHDMARDY# to pause input transfers

Host Strobe B. Output strobe (both edges). The host may stop

SHSTROBE to pause output data transfers

O EIDE Mode:

Primary Device I/O Write. Device write strobe

UltraDMA Mode: Primary Stop. Stop transfer: Asserted by the host prior to

initiation of an UltraDMA burst; negated by the host before data

is transferred in an UltraDMA burst. Assertion of STOP by the

host during or after data transfer in UltraDMA mode signals the

termination of the burst.

O EIDE Mode:

Secondary Device I/O Write. Device write strobe

UltraDMA Mode: Secondary Stop. Stop transfer: Asserted by the host prior to

initiation of an UltraDMA burst; negated by the host before data

is transferred in an UltraDMA burst. Assertion of STOP by the

host during or after data transfer in UltraDMA mode signals the

termination of the burst.

I Primary Device DMA Request. Primary channel DMA request

I Secondary Device DMA Request. Secondary channel DMA request

O Primary Device DMA Acknowledge. Primary channel DMA acknowledge

O Secondary Device DMA Acknowledge. Secondary channel DMA acknowledge

Revision 0.3 June 17, 1999

-9-

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