ISP1562 データシートの表示（PDF） - NXP Semiconductors.
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ISP1562 Datasheet PDF : 94 Pages
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NXP Semiconductors
ISP1562
HS USB PCI host controller
Table 4. VID - Vendor ID register (address 00h) bit description
Legend: * reset value
Bit
Symbol Access Value Description
15 to 0 VID[15:0] R
1131h* Vendor ID: This read-only register value is assigned to NXP Semiconductors by
PCI-SIG as 1131h.
8.2.1.2 Device ID register
This is a 2-byte read-only register that identifies a particular device. The identifier is
allocated by NXP Semiconductors. Table 5 shows the bit description of the register.
Table 5. DID - Device ID register (address 02h) bit description
Legend: * reset value
Bit
Symbol Access Value Description
15 to 0 DID[15:0] R
X*[1] Device ID: This register value is defined by NXP Semiconductors to identify
the Hi-Speed USB host controller IC product. For the ISP1562, NXP
Semiconductors has defined OHCI functions as 1561h, and the EHCI function
as 1562h.
[1] X is 1561h for OHCI1 and OHCI2; X is 1562h for EHCI.
8.2.1.3 Command register
This is a 2-byte register that provides coarse control over the ability of a device to
generate and respond to PCI cycles. The bit allocation of the Command register is given
in Table 6. When logic 0 is written to this register, the device is logically disconnected from
the PCI bus for all accesses, except configuration accesses. All devices are required to
support this base level of functionality. Individual bits in the Command register may or may
not support this base level of functionality.
Table 6. CMD - Command register (address 04h) bit allocation
Bit
15
14
13
12
11
Symbol
reserved[1]
Reset
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
Bit
7
6
5
4
3
Symbol
SCTRL
PER
VGAPS
MWIE
SC
Reset
0
0
0
0
0
Access
R
R/W
R
R/W
R
10
9
8
FBBE
SERRE
0
0
0
R/W
R/W
R/W
2
1
0
BM
MS
IOS
0
0
0
R/W
R/W
R/W
[1] The reserved bits should always be written with the reset value.
ISP1562_3
Product data sheet
Rev. 03 — 14 November 2008
© NXP B.V. 2008. All rights reserved.
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