EM78P569 データシートの表示（PDF） - ELAN Microelectronics
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EM78P569 Datasheet PDF : 58 Pages
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EM78P569
8-bit OTP Micro-controller
PAGE2 (SPI data buffer)
7
6
5
4
3
2
1
0
SPIB7 SPIB6 SPIB5 SPIB4 SPIB3 SPIB2 SPIB1 SPIB0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 0 ~ Bit 7 (SPIB0 ~ SPIB7) : SPI data buffer
If you write data to this register, the data will write to SPIW register. If you read this data, it will read the
data from SPIR register. Please refer to figure7
PAGE3 (DT1L: the Least Significant Byte ( Bit 7 ~ Bit 0) of Duty Cycle of PWM1)
7
6
5
4
3
2
1
0
PWM1[7] PWM1[6] PWM1[5] PWM1[4] PWM1[3] PWM1[2] PWM1[1] PWM1[0]
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
A specified value keeps the output of PWM1 to stay at high until the value matches with TMR1.
R7 (PORT7 I/O data, Data RAM bank, PWM1 duty, ADC output and resolution)
PAGE0 (PORT7 I/O data register)
7
6
5
4
3
2
1
0
P77
P76
P75
P74
P73
P72
P71
P70
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 0 ~ Bit 7 (P70 ~ P77) : 8-bit PORT7(0~7) I/O data register
User can use IOC register to define input or output each bit.
PAGE1 (ADC output data(8~9), AD resolution control, Data RAM bank selection bits)
7
6
5
4
3
2
1
0
-
-
AD9
AD8 DARES ADRES RAM_B1 RAM_B0
R
R
R/W-0 R/W-0
R/W-0
R/W-0
Bit 0~Bit 1 (RAM_B0~RAM_B1) : Data RAM bank selection bits
Each bank has address 0 ~ address 255 which is total 256 (0.25k) bytes RAM size.
Data RAM bank selection : (Total RAM = 1K)
RAM_B1
0
0
1
1
RAM_B0
0
1
0
1
PAGE
PAGE0
PAGE1
PAGE2
PAGE3
Bit 2(ADRES) : Resolution selection for ADC
0 ADC is 8-bit resolution
When 8-bit resolution is selected, the most significant(MSB) 8-bit data output of the internal 10-bit ADC
will be mapping to RB PAGE1 so R7 PAGE1 bit 4 ~5 will be of no use.
1 ADC is 10-bit resolution
When 10-bit resolution is selected, 10-bit data output of the internal 10-bit ADC will be exactly mapping
to RB PAGE1 and R7 PAGE1 bit 4 ~5.
For program compatible concern : if ADC is used, “please set this bit to 1” because 8-bit ADC resolution
mode will not support in the mask version EM78569.
Bit 3 : Resolution selection for DAC
0 DAC is 8-bit resolution
When 8-bit resolution is selected, the most significant(MSB) 8-bit data output of the internal 10-bit
DAC will be mapping to RA PAGE1 so R5 PAGE1 bit 6 ~7 will be of no use.
1 DAC is 10-bit resolution
When 10-bit resolution is selected, 10-bit data output of the internal 10-bit DAC will be exactly
mapping to RA PAGE1 and R5 PAGE1 bit 6 ~7.
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
16
8/19/2004 V4.4
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