EM78P569 データシートの表示（PDF） - ELAN Microelectronics
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EM78P569 Datasheet PDF : 58 Pages
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EM78P569
8-bit OTP Micro-controller
SEG21, SEG20
0AH
SEG23, SEG22
0BH
SEG25, SEG24
0CH
SEG27, SEG26
0DH
SEG29, SEG28
0EH
SEG31, SEG30
0FH
Bit 4 ~ Bit 5 : Unused
Bit 6 ~ Bit 7(DA8~DA9) : DA8 and DA9 are DAC MSB when R7 page1 bit 3(DARES) is set ,.or unused
when DAREF clear to 0. When using 10 bits resolution DAC, DAO output voltage will
unchanged after write data to these two bits. DAO pin will change after write new data to DAC
low 8 bits data buffer (RA PAGE1).
PAGE2 (SPI control)
7
RBF
R/W-0
6
SPIE
R/W-0
5
SRO
R/W-0
4
SE
R/W-0
3
SCES
R/W-0
2
SBR2
R/W-0
1
SBR1
R/W-0
0
SBR0
R/W-0
SDO
Master Device
SDI
Salve Device
R5 page2
SPIR register
SPIW register
SDI
SPIS Reg
Bit7
Bit 0
SCK
SDO
SPI module
SCK
Fig.4 Single SPI Master / Salve Communication
Fig. 4 shows how SPI to communicate with other device by SPI module. If SPI is a master controller, it
sends clock through the SCK pin. An 8-bit data is transmitted and received at the same time. If SPI,
however, is defined as a slave, its SCK pin could be programmed as an input pin. Data will continue to be
shifted on a basis of both the clock rate and the selected edge.
Bit 0 ~ Bit 2 (SBR0 ~ SBR2) : SPI baud rate selection bits
SBR2
0
0
0
0
1
1
1
1
SBR1
0
0
1
1
0
0
1
1
SBR0
0
1
0
1
0
1
0
1
Mode
Master
Master
Master
Master
Master
Master
Slave
Master
<Note> Fsco = CPU instruction clock
Baud rate
Fsco
Fsco/2
Fsco/4
Fsco/8
Fsco/16
Fsco/32
16.384k
For example :
If PLL is enabled and main clock is selected to 3.5826MHz, the instruction clock is 3.5826MHz/2
Fsco=3.5862MHz/2
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
11
8/19/2004 V4.4
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