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PM4318-BI データシート - PMC-Sierra

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部品番号
PM4318-BI

コンポーネント説明

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244 Pages

File Size
2.1 MB

メーカー
PMC-Sierra
PMC-Sierra PMC-Sierra

DESCRIPTION
The PM4318 Octal E1/T1/J1 Line Interface Device (OCTLIU) is a monolithic integrated circuit suitable for use in long haul and short haul T1, J1 and E1 systems with a minimum of external circuitry. The OCTLIU is configurable via microprocessor control or SPI-compatible serial PROM interface, allowing feature selection without changes to external wiring.


FEATURES
• Monolithic device which integrates eight T1/J1 or E1 short haul and long haul line interface circuits.
• Software switchable between T1/J1 and E1 operation on a per-device basis.
• Meets or exceeds T1/J1 and E1 shorthaul and longhaul network access specifications including ANSI T1.102, T1.403, T1.408, AT&T TR 62411, ITU-T G.703, G.704 as well as ETSI 300-011, CTR-4, CTR- 12 and CTR-13.
• Provides encoding and decoding of B8ZS, HDB3 and AMI line codes.
• Provides receive equalization, clock recovery and line performance monitoring.
• Provides transmit and receive jitter attenuation.
• Provides digitally programmable long haul and short haul line build out.
• Provides a selectable, per channel independent de-jittered T1 or E1 recovered clock for system timing and redundancy.
• Provides PRBS generators and detectors on each tributary for error testing at DS1 and E1 rates as recommended in ITU-T O.151.
• Provides either serial clock/data or parallel Scaleable Bandwidth Interconnect (SBI) interfaces on the system side.
• Can be configured to act as a converter between the SBI interfaces and serial clock/data. In this mode, the LIUs are unused.
• Provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring.
• Provides a hardware-only (no microprocessor) mode in which configuration data is read from an SPIcompatible serial PROM. The PROM interface can be cascaded such that multiple OCTLIU devices can be configured simultaneously from a single PROM.
• Uses line rate system clock.
• Provides an IEEE 1149.1 (JTAG) compliant Test Access Port (TAP) and controller for boundary scan test.
• Implemented in a low power 3.3 V tolerant 1.8/3.3 V CMOS technology.
• Available in a high density 288-pin Tape-SBGA (23 mm by 23 mm) package.
• Provides a –40°C to +85°C Industrial temperature operating range.


APPLICATIONS
• Metro Optical Access Equipment
• Edge Router Linecards
• Multiservice ATM Switch Linecards
• 3G Base Station Controllers (BSC)
• 3G Base Transceiver Stations (BTS)
• Digital Private Branch Exchanges (PBX)
• Digital Access Cross-Connect Systems (DACS) and Electronic DSX Cross-Connect Systems (EDSX)
• T1/E1 Repeaters
• Test Equipment
• SBI to clk/data converter in multi-service access equipment.

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部品番号
コンポーネント説明
PDF
メーカー
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PMC-Sierra
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