Description
Pericom PI6C110E integrates a dual PLL clock generator, SDRAM buffer and I2C interface. The clock generator section comprised of an oscillator, 2 low jitter phased locked loop, skew control, and power down logic. The SDRAM buffers are high speed and low skew to handle data transfers in excess of 133 MHz.

FEATUREs
• 3 of 2.5V 66/100/133 MHz CPU (CPU[0-2])
• 2 of 2.5V 33 MHz APIC (APIC[0-1])
• 9 of 3.3V 100/133 MHz SDRAM (SDRAM[0-7], DCLK)
• 8 of 3.3V 33 MHz PCI (PCI[0-7])
• 2 of 3.3V 66 MHz (3V66 [0-1])
• 2 of 3.3V 48 MHz (48MHz [0-1])
• 1 of 3.3V 14.3 MHz (REF)
• Selectable CPU and SDRAM clocks (on power up only)
• Power down function using PWR_DWN#
• Spread Spectrum Enable/Disable by I2C
• I2C interface to turn off unused clocks
• 56 pin SSOP package (V)