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M66256FP データシート - Renesas Electronics

M66256FP image

部品番号
M66256FP

コンポーネント説明

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14 Pages

File Size
159.1 kB

メーカー
Renesas
Renesas Electronics Renesas

Description
The M66256FP is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology.
It has separate clock, enable and reset signals for write and read, and is most suitable as a buffer memory between devices with different data processing throughput.


FEATUREs
• Memory configuration: 5120 words × 8 bits (dynamic memory)
• High-speed cycle: 25 ns (Min)
• High-speed access: 18 ns (Max)
• Output hold: 3 ns (Min)
• Fully independent, asynchronous write and read operations
• Variable length delay bit
• Output: 3 states


APPLICATION
   Digital photocopiers, high-speed facsimile, laser beam printers.

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コンポーネント説明
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