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EL4585 データシート - Intersil

EL4585 image

部品番号
EL4585

コンポーネント説明

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Intersil
Intersil Intersil

The EL4585 is a PLL (Phase Lock Loop) sub-system, designed for video applications and also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS-compatible pixel clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to it.


FEATUREs
• 36MHz, general purpose PLL
• 8FSC timing (use the EL4584 for 4FSC)
• Compatible with EL4583 sync separator
• VCXO, Xtal, or LC tank oscillator
• < 2ns jitter (VCXO)
• User-controlled PLL capture and lock
• Compatible with NTSC and PAL TV formats
• 8 pre-programmed popular TV scan rate clock divisors
• Single 5V, low current operation
• Pb-Free Available (RoHS Compliant)


APPLICATIONs
• Pixel clock regeneration
• Video compression engine (MPEG) clock generator
• Video capture or digitization
• PIP (Picture in Picture) timing generator
• Text or graphics overlay timing

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部品番号
コンポーネント説明
PDF
メーカー
Horizontal Genlock, 8FSC
Renesas Electronics
Horizontal Genlock, 4FSC
Renesas Electronics
Horizontal Genlock, 4FSC
Intersil
Horizontal Genlock, 8 FSC
Elantec -> Intersil
Horizontal Genlock, 8 FSC
Elantec -> Intersil
Horizontal Genlock, 4 FSC
Elantec -> Intersil
Horizontal Genlock, 4 FSC
Elantec -> Intersil
GENLOCK ADC
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Video Genlock PLL
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