EL4585 データシートの表示（PDF） - Intersil

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EL4585

Horizontal Genlock, 8FSC

Intersil 

EL4585

Pin Descriptions

Pin NUMBER

PIN NAME

FUNCTION

1, 2, 16

3

4

5

6

7

PROG B, C, A Digital inputs to select ÷ N value for internal counter. See Table 1 for values.

OSC/VCO OUT Output of internal inverter/oscillator. Connect to external crystal or LC tank VCO circuit.

VDD (A)

Analog positive supply for oscillator, PLL circuits.

OSC/VCO IN Input from external VCO.

VSS (A)

Analog ground for oscillator, PLL circuits.

CHARGE PUMP

OUT

Connect to loop filter. If the HSYNC phase is leading or HSYNC frequency > CLK ÷ 2N, current is pumped

into the filter capacitor to increase VCO frequency. If HSYNC phase is lagging or frequency < CLK ÷ 2N,

current is pumped out of the filter capacitor to decrease VCO frequency. During coast mode or when

locked, charge pump goes to a high impedance state.

8

DIV SELECT Divide select input. When high, the internal divider is enabled and EXT DIV becomes a test pin, outputting

CLK ÷ 2N. When low, the internal divider is disabled and EXT DIV is an input from an external ÷N.

9

COAST

Three-state logic input. Low (< 1/3*VCC) = normal mode, Hi Z (or 1/3 to 2/3*VCC) = fast lock mode,

High (> 2/3*VCC) = coast mode.

10

HSYNC IN Horizontal sync pulse (CMOS level) input.

11

VDD (D)

Positive supply for digital, I/O circuits.

12

LOCK DET Lock detect output. Low level when PLL is locked. Pulses high when out of lock.

13

EXT DIV

External divide input when DIV SEL is low, internal ÷ 2N output when DIV SEL is high.

14

VSS (D)

Ground for digital, I/O circuits.

15

CLK OUT

Buffered output of the VCO.

PROG A (PIN 16)

0

0

0

0

1

1

1

1

TABLE 1. VCO DIVISORS

PROG B (PIN 1)

PROG C (PIN 2)

0

0

0

1

1

0

1

1

0

0

0

1

1

0

1

1

DIV VALUE (N)

1702

1728

1888

2270

1364

1716

1560

1820

4

FN7175.4

September 3, 2009

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