54HCT163 データシートの表示（PDF） - Unspecified

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54HCT163

High Speed CMOS TTL Input

Unspecified 

High Speed CMOS TTL Input – 74HCT163

DC Electrical Characteristics Continued (Voltages Referenced to GND)

PARAMETER

SYMBOL VCC

CONDITIONS

25°C

LIMITS

85°C FULL RANGE4

Maximum Input

Leakage Current

IIN

5.5V VIN = VCC or GND

±0.1

±1.0

±1.0

Maximum Quiescent

Supply Leakage

Current5

ICC

5.5V

VIN = VCC or GND

│IOUT│≤ 0µA

4

40

40

Additional Quiescent

Supply Current5

ΔICC

5.5V

VIN = 2.4V,

Any One Input.

VIN = VCC or

GND,

Other Inputs

IOUT = 0µA

≥ -40°C

2.9

25°C to 85°C

2.4

4. -40˚C ≤ TJ ≤ +85˚C 5. Total Supply Current = ICC + ΣΔICC.

Rev 1.0

06/06/19

UNITS

µA

µA

mA

AC Electrical Characteristics6

PARAMETER

SYMBOL

VCC

CONDITIONS

Maximum Clock

Frequency

(50% Duty Cycle)

fMAX

(Figure 1, 3)

Maximum Propagation

tPLH

Delay, CP to Q

(Figure 1, 3)

tPHL

Maximum Propagation

tPLH

Delay, TE to TC

Func(Ftigiourne 1D, 3e) scriptiontPHL

Maximum Propagation

tPLH

Delay, CP to TC

(Figure 1, 3)

tPHL

Maximum Output

Transition Time,

Any Output

(Figure 1, 3)

tTLH, tTHL

Maximum Input

Capacitance

CIN

Power Dissipation

Capacitance Per Gate6

CPD

5V ±10%

5V ±10%

5V ±10%

5V ±10%

5V ±10%

-

5V

CL = 50pF,

Input

tr = tf = 6ns

CL = 50pF,

Input

tr = tf = 6ns

CL = 50pF,

Input

tr = tf = 6ns

CL = 50pF,

Input

tr = tf = 6ns

CL = 50pF,

Input

tr = tf = 6ns

-

TJ = 25°C

6. Not production tested in die form, characterized by chip design and tested in package.

7. Used to determine the no-load dynamic power consumption: PD = CPD VCC2f + ICC VCC.

25°C

30

20

25

16

21

22

28

15

10

LIMITS

UNITS

85°C FULL RANGE4

24

24

MHz

23

23

ns

30

30

18

18

ns

24

24

25

25

ns

33

33

19

19

ns

10

10

pF

TYPICAL

pF

60

Page 5 of 9

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