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54HCT163 データシートの表示(PDF) - Unspecified

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54HCT163
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54HCT163 Datasheet PDF : 9 Pages
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High Speed CMOS TTL Input – 74HCT163
Programmable 4–bit counter with synchronous reset in bare die form
Rev 1.0
06/06/19
Description
The 74HCT163 programmable synchronous 4-bit decade
and binary counter is fabricated using a 2.5µm 5V CMOS
process with the same high speed performance of LSTTL
combined with CMOS low power consumption. Clock
input is active on the rising edge. Both load (SPE) and
clear (MR) inputs are active low. Presetting is synchronous
on rising clock edge. Two enable inputs (TE and PE) and
ripple carry output (TC) are provided to enable easy
cascading of counters, facilitating simple implementation
of N-bit counters without use of external gates. Device
inputs directly accept LSTTL or CMOS. All inputs are
protected against ESD and excess voltage transients.
Ordering Information
Features:
ƒ Output Drive Capability: 10 LSTTL Loads
ƒ Low Input Current: 1µA
ƒ TTL / CMOS compatible Input Levels
ƒ Outputs directly interface CMOS, NMOS and TTL
ƒ Operating Voltage Range: 4.5V to 5.5V
ƒ Function compatible with 74LS163.
Die Dimensions in µm (mils)
The following part suffixes apply:
ƒ No suffix - MIL-STD-883 /2010B Visual Inspection
1950 (77)
For High Reliability version of this product please see
54HCT163
Supply Formats:
ƒ Default – Die in Waffle Pack (100 per tray capacity)
ƒ Sawn Wafer on Tape – On request
ƒ Unsawn Wafer – On request
ƒ Die Thickness <> 350µm(14 Mils) – On request
ƒ Assembled into Ceramic Package – On request
Mechanical Specification
Die Size (Unsawn)
Minimum Bond Pad Size
Die Thickness
Top Metal Composition
Back Metal Composition
1950 x 1700 µm
78 x 67
mils
120 x 120
µm
4.72 x 4.72 mils
350 (±20)
µm
13.78 (±0.79) mils
Al 1%Si 1.1µm
N/A – Bare Si
Page 1 of 9
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