DS21448 データシートの表示（PDF） - Maxim Integrated

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DS21448

3.3V E1/T1/J1 Quad Line Interface

Maxim Integrated 

1. BLOCK DIAGRAMS

Figure 1-1. Block Diagram

CHANNEL 4

CHANNEL 3

CHANNEL 2

CHANNEL 1

DS21448 3.3V T1/E1/J1 Quad Line Interface

TYPICAL OF ALL FOUR CHANNELS

2

2

POWER

CONNECTIONS

RRING

RTIP

JACLK

VCO/PLL

2.048MHz TO

1.544MHz PLL

n

16.384MHz OR

8.192MHz OR

4.096MHz OR

2.048MHz

SYNTHESIZER

See Figure 1-2

TRING

TTIP

BIS0

UNFRAMED

ALL-ONES

INSERTION

MUX (THE SERIAL, PARALLEL, AND HARDWARE INTERFACES

SHARE DEVICE PINS)

MUX

See Figure 1-3

CONTROL AND TEST

PORT (ROUTED TO

ALL BLOCKS)

BPCLK

RPOS

RCLK

RNEG

PBEO

RCL/LOTC

TPOS

TCLK

TNEG

HRST

TXDIS/TEST

SERIAL

INTERFACE

PARALLEL INTERFACE

CONTROL AND

(ROUTED TO

ALL BLOCKS)

58

JTAG PORT

Dallas

Semiconductor

DS21448

5 of 60

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