7C185A-20 データシートの表示（PDF） - Cypress Semiconductor

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7C185A-20

8K x 8 Static RAM

Cypress Semiconductor 

Switching Waveforms (continued)

Write Cycle No. 2 (CE Controlled)[13, 14, 15]

ADDRESS

CE1

tSA

CE2

WE

DATA IN

DATA I/O

tWC

tSCE1

tSCE2

tAW

tPWE

tSD

DATAIN VALID

HIGH IMPEDANCE

Note:

15. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.

tHA

tHD

CY7C185A

C185A–9

6

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