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7C185A-20 データシートの表示(PDF) - Cypress Semiconductor

部品番号
コンポーネント説明
一致するリスト
7C185A-20
Cypress
Cypress Semiconductor Cypress
7C185A-20 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
CY7C185A
Switching Characteristics Over the Operating Range[7]
Parameter
Description
7C185A20 7C185A25 7C185A35 7C185A45
Min. Max. Min. Max. Min. Max. Min. Max. Unit
READ CYCLE
tRC
Read Cycle Time
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE1
CE1 LOW to Data Valid
tACE2
CE2 HIGH to Data Valid
tDOE
OE LOW to Data Valid
tLZOE
tHZOE
tLZCE1
OE LOW to Low Z
OE HIGH to High Z[8]
CE1 LOW to Low Z[9]
tLZCE2
tHZCE
CE2 HIGH to Low Z
CE1 HIGH to High Z[8, 9]
CE2 LOW to High Z
tPU
CE1 LOW to Power-Up
tPD
CE1 HIGH to Power-Down
WRITE CYCLE[10]
20
25
35
45
ns
20
25
35
45 ns
3
3
3
3
ns
20
25
35
45 ns
20
25
35
30 ns
10
12
15
20 ns
3
3
3
3
ns
8
10
12
15 ns
5
5
5
5
ns
3
3
3
3
ns
8
10
15
15 ns
0
0
0
0
ns
20
20
20
25 ns
tWC
Write Cycle Time
20
20
25
40
ns
tSCE1
CE1 LOW to Write End
15
20
25
30
ns
tSCE2
CE2 HIGH to Write End
15
20
25
30
ns
tAW
Address Set-Up to Write End
15
20
25
30
ns
tHA
Address Hold from Write End
0
0
0
0
ns
tSA
Address Set-Up to Write Start
0
0
0
0
ns
tPWE
WE Pulse Width
15
15
20
20
ns
tSD
Data Set-Up to Write End
10
10
15
15
ns
tHD
Data Hold from Write End
0
0
0
0
ns
tLZWE
tHZWE
WE HIGH to Low Z
WE LOW to High Z[8]
3
5
5
5
ns
7
7
10
15 ns
Notes:
7. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and 30-pF load capacitance.
8. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
9. At any given temperature and voltage condition, tHZCE is less than tLZCE for any given device.
10. Device is continuously selected. OE, CE = VIL. CE2 = VIH.
4

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