UPD720100A データシートの表示（PDF） - NEC => Renesas Technology
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UPD720100A Datasheet PDF : 32 Pages
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AC Characteristics (VDD = 3.0 to 3.6 V, TA = 0 to +70°C)
PCI Interface Block
Parameter
PCI clock cycle time
PCI clock pulse, high-level width
PCI clock pulse, low-level width
PCI clock, rise slew rate
PCI clock, fall slew rate
PCI reset active time
(vs. power supply stability)
PCI reset active time (vs. CLK Start)
Output float delay time (vs. RST0↓)
PCI reset rise slew rate
PCI bus signal output time (vs. PCLK↑)
PCI point-to-point signal output time
(vs. PCLK↑)
Output delay time (vs. PCLK↑)
Output float delay time (vs. PCLK↑)
Input setup time (vs. PCLK↑)
Point-to-point input setup time (vs. PCLK↑)
Input hold time
Symbol
tcyc
thigh
tlow
Scr
Scf
trst
Conditions
0.2 VDD to 0.6 VDD
0.2 VDD to 0.6 VDD
trst-clk
trst-off
Srr
tval
tval (ptp)
REQ0
ton
toff
tsu
tsu (ptp)
th
GNT0
µPD720100A
MIN.
30
11
11
1
1
1
MAX.
4
4
Unit
ns
ns
ns
V/ns
V/ns
ms
100
40
50
2
11
2
12
µs
ns
mV/ns
ns
ns
2
ns
28
ns
7
ns
10
ns
0
ns
Data Sheet S15535EJ2V0DS
19
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