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UPD720100A データシートの表示(PDF) - NEC => Renesas Technology

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UPD720100A
NEC
NEC => Renesas Technology NEC
UPD720100A Datasheet PDF : 32 Pages
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µPD720100A
Power Consumption
Parameter
Symbol
Condition
TYP.
Unit
Power Consumption
PWD0-0
The power consumption under the state without suspend.
Device state = D0, All the ports does not connect to any
function. Note 1
168.0
mA
PWD0-2
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 2. Note 2
EHCI host controller is inactive.
EHCI host controller is active.
186.2
mA
301.6
mA
PWD0-3
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 3. Note 2
EHCI host controller is inactive.
EHCI host controller is active.
195.3
mA
368.4
mA
PWD0-4
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 4. Note 2
EHCI host controller is inactive.
EHCI host controller is active.
204.4
mA
435.2
mA
PWD0-5
The power consumption under the state without suspend.
Device state = D0, The number of active ports is 5. Note 2
EHCI host controller is inactive.
EHCI host controller is active.
213.5
mA
502.0
mA
PWD0_S
The power consumption under suspend state.
Device state = D0, The internal clock is stopped. Note 3
136.2
mA
PWD0_C
The power consumption under suspend state during PCI clock
113.0
mA
is stopped by CRUN0. Device state = D0,
The internal clock is stopped. Note 3
PWD1
Device state = D1, Analog PLL output is stopped. Note 3, 4
24.7
mA
PWD2
Device state = D2, Analog PLL output is stopped. Note 3, 4
10.9
mA
PWD3H
Device state = D3hot, PIN_EN = High
Analog PLL output is stopped. Note 3, 4
10.9
mA
PWD3C
Device state = D3cold , PIN_EN = Low
Oscillator output is stopped. Note 3, 4, 5
650
µA
Notes
1. When any device is not connected to all the ports of HC, the power consumption for HC does not
depend on the number of active ports.
2. The number of active ports is set by the value of Port No field in PCI configuration space EXT
register.
3. For the condition of clock stop, see µPD720100A Users Manual 7.3 Control for System Clock
Operation.
4. When the device state = D1, PCI clock is defined as it is running. When the device state = D2 or D3,
PCI clock is defined as it is stopped.
5. If 48 MHz oscillator clock-in is used, power consumption for oscillator block + HC chip will be more
than 15 mA.
Data Sheet S15535EJ2V0DS
17

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