UPD720100A データシートの表示（PDF） - NEC => Renesas Technology

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UPD720100A

USB2.0 HOST CONTROLLER

NEC => Renesas Technology 

Parameter

Symbol

High-speed Source Electrical Characteristics

Rise time (10% - 90%)

tHSR

Fall time (90% - 10%)

tHSF

Driver waveform

See Figure 2-6.

High-speed Data Rate

tHSDRAT

Microframe Interval

tHSFRAM

Consecutive Microframe Interval Difference tHSRFI

Conditions

Data source jitter

Receiver jitter tolerance

Hub event Timings

Time to detect a downstream facing port

connect event

Time to detect a disconnect event at a

downstream facing port:

Duration of driving resume to a

downstream port

Time from detecting downstream resume

to rebroadcast.

Inter-packet Delay for packets traveling in

same direction for high-speed

Inter-packet Delay for packets traveling in

opposite direction for high-speed

Inter-packet delay for root hub response for

high-speed

Time for which a Chirp J or Chirp K must

be continuously detected during Reset

handshake

Time after end of device Chirp K by which

hub must start driving first Chirp K

Time for which each individual

Chirp J or Chirp K in the chirp sequence is

driven downstream during reset

Time before end of reset by which a hub

must end its downstream chirp sequence

See Figure 2-6.

See Figure 2-4.

tDCNN

tDDIS

tDRSMDN

Nominal

tURSM

tHSIPDSD

tHSIPDOD

tHSRSPIPD1

tFILT

tWTDCH

tDCHBIT

tDCHSE0

µPD720100A

MIN.

MAX.

(2/2)

Unit

500

ps

500

ps

479.760

124.9375

480.240

125.0625

4 high-

speed

Mbps

µs

Bit

times

2.5

2000

µs

2.0

2.5

µs

20

ms

1.0

ms

88

Bit

times

8

Bit

times

192

Bit

times

2.5

µs

100

µs

40

60

µs

100

500

µs

Data Sheet S15535EJ2V0DS

21

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