V370PDC データシートの表示（PDF） - QuickLogic Corporation

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V370PDC

High Performance PCI SDRAM Controller with Integrated Peripheral Control Unit

QuickLogic Corporation 

V370PDC

3.5 Local Bus Timings

Table 10: Local Bus AC Test Conditions

Symbol

Parameter

VCC

VIN

COUT

Supply voltage 3.3 volt operation

Input low and high voltages

Capacitive load on output and I/O pins

Limits Units

3.0 to 3.60 V

0.4 and 2.0 V

50

pF

Table 11: Capacitive Derating for Output and I/O Pins

Output Drive Limit

8mA

12mA

Supply voltage

3.3 volt

3.3 volt

Derating

TBA

TBA

Figure 3: Clock and Synchronous Signals

LOCAL CLOCK

INPUT SETUP/HOLD

OUTPUT VALID

OUTPUT DRIVE

OUTPUT FLOAT

TS U

TC

TCH

TH

VALID

TCOV

,,,,,,,,,,,

Tczo

,,,,,,

TCOZ ,,,,,,

TCL

VALID

VALID

:

12

V370PDC_A0 Data Sheet Rev 1.00 DS-PD01-0100

Copyright © 1999, V3 Semiconductor Inc.

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