NJU3502L データシートの表示（PDF） - Japan Radio Corporation

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NJU3502L

4-BIT SINGLE CHIP MICRO CONTROLLER

Japan Radio Corporation  

NJU3502

[Enabled all factors (b0 to b2 of PHY5 were set to "1")]

Interrupt

Enable / Disable

Enabled all factors

External Interrupt-1

Request flag

Internal Interrupt-1

Request flag

Internal Interrupt-2

Request flag

External Interrupt-1

Internal Interrupt-1

Internal Interrupt-2

External Interrupt-1 Internal Interrupt-1 Internal Interrupt-2

Process

Process

Process

[From the all factors disabled to the enabled(b0 to b2 of PHY5 are changed from "0" to "1")]

Interrupt

Enable / Disable

Disabled all factors

Enabled all factors

External Interrupt

Input(EXTI terminal)

External Interrupt-1

Request flag

External Interrupt-1

∗ The internal interrupt is also ignored while it is disabled.

External Interrupt-1

Process

[From the all factors enabled to the disabled(b0 to b2 of PHY5 are changed from "1" to "0")]

Interrupt

Enable / Disable

Enabled all factors

An example of the transition from the

enabled all factors to the disabled in the

interrupt operation.

Disabled all factors

External Interrupt-1

Request flag

Internal Interrupt-1

Request flag

External Interrupt-1

Internal Interrupt-1

External Interrupt-1

Process

The interrupt operation does

not execute after the prior

operation end.

∗ When the interrupt is enabled, the latest interrupt request occurred during the prior other interrupt

process starts its interrupt process after the prior interrupt operation. However, when the interrupt is

disabled during the prior interrupt process as shown in above timing chart, the latest interrupt request

does not start. But the prior interrupt process is completed.

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