NJU3502L データシートの表示（PDF） - Japan Radio Corporation

部品番号

コンポーネント説明

一致するリスト

NJU3502L

4-BIT SINGLE CHIP MICRO CONTROLLER

Japan Radio Corporation  

NJU3502

An example of the serial data transmitting program)

In the internal clock operation, the SDI(O) terminal is set as the output and the data in RAM is transmitted.

:

:

;---- Interrupt process ----

ORG $30

;Interrupt vector address of FULL or EMPTY

SINT

SRPC

;

LDI Y,1

;The Serial Input / Output control register is set

TPA

;

TBA 0

;The end flag of transmission is tested

JMP SIO_OK

;

JMP SINT_E

;

;

SIO_OK RRPC

;The end flag of transmission is set

LDI X,SIO_FLG.X ;

LDI Y,SIO_FLG.Y ;

LDI A,1

;

TAM

;

;

SINT_E RETI

; End of the interrupt process

;

;------ Serial data transmitting process ------

SIO_OUT SRPC ;

LDI Y,2

;The Serial Input / Output shift register is set

;

RRPC

;RAM to store the serial output data is set

LDI X,SIO_DAT.X ;RAM address, X=0

LDI Y,SIO_DAT.Y ;RAM address, Y=1

TMPICY

;The data in RAM is transferred to the Serial Input /

; Output shift register(lower 4-bit)

; and Y-register is incremented

TMPICY

;The data in RAM is transferred to the Serial Input /

; Output shift register(higher 4-bit)

; & Increments Y

;

SRPC

;

LDI Y,1

;The Serial Input / Output control register is set

LDI A,%1000

;The internal clock operation and the transmission

; mode are set

TAP

;

LDI A,%1001

;The serial data transmitting operation is started

TAP

;

;

:

:

WSEG

;The RAM area

SIO_FLG DS 1

;The end flag of transmission

SIO_DAT DS 2

;The area to store the serial output data

- 26 -

Share Link: