MAX4561_V1 データシートの表示（PDF） - Maxim Integrated
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MAX4561_V1 Datasheet PDF : 11 Pages
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±15kV ESD-Protected, Low-Voltage,
SPDT/SPST, CMOS Analog Switches
±15kV ESD Protection
The MAX4561/MAX4568/MAX4569 are ±15kV ESD-pro-
tected at the NC/NO terminals in accordance with
IEC1000-4-2. To accomplish this, bidirectional SCRs
are included on-chip between these terminals. When
the voltages at these terminals go Beyond-the-Rails™,
the corresponding SCR turns on in a few nanoseconds
and bypasses the surge safely to ground. This method
is superior to using diode clamps to the supplies
because unless the supplies are very carefully decou-
pled through low-ESR capacitors, the ESD current
through the diode clamp could cause a significant
spike in the supplies. This may damage or compromise
the reliability of any other chip powered by those same
supplies.
There are diodes from NC/NO to the supplies in addi-
tion to the SCRs. A resistance in series with each of
these diodes limits the current into the supplies during
an ESD strike. The diodes protect these terminals from
overvoltages that are not a result of ESD strikes. These
diodes also protect the device from improper power-
supply sequencing.
Once the SCR turns on because of an ESD strike, it
remains on until the current through it falls below its
“holding current.” The holding current is typically
110mA in the positive direction (current flowing into
the NC/NO terminal) at room temperature (see
SCR Holding Current vs.Temperature in the Typical
Operating Characteristics). Design the system so that
any sources connected to NC/NO are current-limited to
a value below the holding current to ensure the SCR
turns off when the ESD event is finished and normal
operation resumes. Also, remember that the holding
current varies significantly with temperature. The worst
case is at +85°C when the holding currents drop to
70mA. Since this is a typical number to guarantee turn-
off of the SCRs under all conditions, the sources con-
nected to these terminals should be current-limited to
no more than half this value. When the SCR is latched,
the voltage across it is approximately 3V. The supply
voltages do not affect the holding current appreciably.
The sources connected to the COM side of the switches
need not be current limited since the switches turn off
internally when the corresponding SCR(s) latch.
Even though most of the ESD current flows to GND
through the SCRs, a small portion of it goes into V+.
Therefore, it is a good idea to bypass the V+ with 0.1µF
capacitors directly to the ground plane.
ESD protection can be tested in various ways. Inputs
are characterized for protection to the following:
Beyond-the-Rails is a trademark of Maxim Integrated Products.
•±15kV using the Human Body Model
•±8kV using the Contact Discharge method speci-
fied in IEC 1000-4-2 (formerly IEC 801-2)
•±15kV using the Air-Gap Discharge method speci-
fied in IEC 1000-4-2 (formerly IEC 801-2)
ESD Test Conditions
Contact Maxim Integrated Products for a reliability report
that documents test setup, methodology, and results.
Human Body Model
Figure 6 shows the Human Body Model, and Figure 7
shows the waveform it generates when discharged into a
low impedance. This model consists of a 100pF capacitor
charged to the ESD voltage of interest, which can be dis-
charged into the test device through a 1.5kΩ resistor.
IEC 1000-4-2
The IEC 1000-4-2 standard covers ESD testing and
performance of finished equipment; it does not specifi-
cally refer to integrated circuits. The MAX4561 enables
the design of equipment that meets Level 4 (the highest
level) of IEC 1000-4-2, without additional ESD protec-
tion components.
The major difference between tests done using the
Human Body Model and IEC 1000-4-2 is higher peak cur-
rent in IEC 1000-4-2. Because series resistance is lower
in the IEC 1000-4-2 ESD test model (Figure 8), the ESD
withstand voltage measured to this standard is generally
lower than that measured using the Human Body Model.
Figure 9 shows the current waveform for the ±8kV IEC
1000-4-2 Level 4 ESD Contact Discharge test.
The Air-Gap test involves approaching the device with a
charged probe. The Contact Discharge method connects
the probe to the device before the probe is energized.
PROCESS: CMOS
Chip Information
7
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