ISP1561 データシートの表示（PDF） - Philips Electronics

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ISP1561

Hi-Speed USB PCI host controller

Philips Electronics 

Philips Semiconductors

ISP1561

USB PCI host controller

PMCSR register (address: value read from address 34H + 4H): The Power

Management Control/Status (PMCSR) register is a two-byte register used to manage

the power management state of the PCI function as well as to enable and monitor

Power Management Events (PMEs). The bit allocation of the register is given in

Table 35.

Table 35: PMCSR register: bit allocation

Bit

15

14

13

12

Symbol

PMES

DS[1:0]

Reset

X[1]

0

0

0

Access

R/W

R

R

R/W

Bit

7

6

5

4

Symbol

reserved

Reset

0

0

0

0

Access

-

-

-

-

11

10

D_S[3:0]

0

0

R/W

R/W

3

2

0

0

-

-

9

8

PMEE

0

X[1]

R/W

R/W

1

0

PS[1:0]

0

0

R/W

R/W

[1] Sticky bit, if the function supports PME# from D3cold then X is indeterminate at the time of initial operating system boot; X is 0 if the

function does not support PME# from D3cold.

Table 36:

Bit

15

14 to 13

12 to 9

PMCSR register: bit description

Symbol Description

PMES

PME Status: This bit is set when the function would normally assert

the PME# signal independent of the state of the PME_EN bit.

Writing logic 1 to this bit clears it and causes the function to stop

asserting PME# (if enabled). Writing logic 0 has no effect. This bit

defaults to logic 0 if the function does not support the PME#

generation from D3cold. If the function supports the PME#

generation from D3cold, then this bit is sticky and must be explicitly

cleared by the operating system each time the operating system is

initially loaded.

DS[1:0]

Data Scale: This two-bit read-only field indicates the scaling factor

to be used when interpreting the value of the Data register. The

value and meaning of this field vary depending on which data value

has been selected by the D_S field. This field is a required

component of the Data register (offset 7) and must be implemented

if the Data register is implemented. If the Data register has not been

implemented, this field must return 00B when PMCSR is read.

D_S[3:0]

Data_Select: This four-bit field is used to select which data is to be

reported through the Data register and the D_S field. This field is a

required component of the Data register (offset 7) and must be

implemented if the Data register is implemented. If the Data register

has not been implemented, this field must return 00B when PMCSR

is read.

9397 750 10015

Product data

Rev. 01 — 06 February 2003

© Koninklijke Philips Electronics N.V. 2003. All rights reserved.

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