ISP1561 データシートの表示（PDF） - Philips Electronics

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ISP1561

Hi-Speed USB PCI host controller

Philips Electronics 

Philips Semiconductors

ISP1561

USB PCI host controller

Table 18: Subsystem Vendor ID register: bit description

Bit

Symbol

Access

Value

Description

15 to 0 SVID[15:0] R

1131H

Subsystem Vendor ID: 1131H is the subsystem Vendor ID

assigned to Philips Semiconductors.

Subsystem ID register (address: 2EH): Subsystem ID values are vendor specific.

The bit description of the Subsystem ID register is given in Table 19.

Table 19: Subsystem ID register: bit description

Bit

Symbol

Access

Value

15 to 0 SID[15:0] R

156XH[1]

Description

Subsystem ID: For the ISP1561, Philips Semiconductors has

defined OHCI functions as 1561H, and the EHCI function as 1562H.

[1] X is 1H for OHCI1 and OHCI2; X is 2H for EHCI.

Expansion ROM Base Address register (address: 30H): Some PCI devices,

especially those intended for use on expansion boards in the PC architecture, require

local EPROMs for expansion ROM. This four-byte register at offset 30H in a type 00H

predefined header is defined to handle the base address and size information for this

expansion ROM. The ISP1561 does not support expansion EPROM.

Capabilities Pointer register (address: 34H): The Capabilities Pointer register is

used to point to a linked list of new capabilities implemented by the device. This

register is only valid if the CL bit in the Status register is set. If implemented, bit 1 and

bit 0 are reserved and should be set to 00B. Software should mask these bits off

before using this register as a pointer in Configuration Space to the first entry of a

linked list of new capabilities. The bit description of the register is given in Table 20.

Table 20: Capabilities Pointer register: bit description

Bit

Symbol

Access

Value

Description

7 to 0 CP[7:0]

R

DCH

Capabilities Pointer: EHCI manages power efficiently using this

register. This Power Management register is allocated at offset

DCH. Only one Host Controller is needed to manage power in the

ISP1561.

Interrupt Line register (address: 3CH): The Interrupt Line register is a one-byte

read/write register used to communicate interrupt line routing information. This

register must be implemented by any device (or device function) that uses an

interrupt pin. The interrupt allocation is done by the BIOS. The POST software needs

to write the routing information into this register as it initializes and configures the

system. The bit description of the Interrupt Line register is given in Table 21.

The value in this register tells which input of the system interrupt controller(s) the

interrupt pin of the device is connected to. The device itself does not use this value,

rather it is used by device drivers and operating systems. Device drivers and

operating systems can use this information to determine priority and vector

information. Values in this register are system architecture specific.

Table 21: Interrupt Line register: bit description

Bit

Symbol

Access

Value

7 to 0 IL[7:0]

R/W

00H

Description

Interrupt Line: Indicates which IRQ is used for reporting interrupt

from the ISP1561.

9397 750 10015

Product data

Rev. 01 — 06 February 2003

© Koninklijke Philips Electronics N.V. 2003. All rights reserved.

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