IDT82V2048 データシートの表示（PDF） - Integrated Device Technology

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IDT82V2048

OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT

Integrated Device Technology 

IDT82V2048 OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT

INDUSTRIAL TEMPERATURE RANGES

PIN DESCRIPTION (CONTINUED)

Name

TRST

TMS

TCK

Type

I

Pullup

I

Pullup

I

Pin No.

QFP144 BGA160

Description

JTAG Signals

95

G12 TRST: JTAG Test Port Reset (Active Low)

This is the active low asynchronous reset to the JTAG Test Port. This pin has an internal pullup

resistor and it can be left disconnected.

96

F11 TMS: JTAG Test Mode Select

The signal on this pin controls the JTAG test performance and is clocked into the device on rising

edges of TCK. This pin has an internal pullup resistor and it can be left disconnected.

97

F14 TCK: JTAG Test Clock

This pin input the clock of the JTAG Test. The data on TDI and TMS are clocked into the device on

rising edges of TCK, while the data on TDO is clocked out of the device on falling edges of TCK.

TDO O

98

Tri-state

TDI

I

99

Pull up

IC

-

93

IC

-

94

VDDIO -

17

92

GNDIO -

18

91

VDDT0 -

44

VDDT1

53

VDDT2

56

VDDT3

65

VDDT4

116

VDDT5

125

VDDT6

128

VDDT7

137

GNDT0 -

47

GNDT1

50

GNDT2

59

GNDT3

62

GNDT4

119

GNDT5

122

GNDT6

131

GNDT7

134

VDDD -

19

VDDA

90

GNDD -

20

GNDA

89

F13 TDO: JTAG Test Data Output

This pin output the serial data of the JTAG Test. The data on TDO is clocked out of the device on

falling edges of TCK. TDO is a Tri-state output signal. It is active only when scanning of data is

out.

F12 TDI: JTAG Test Data Input

This pin input the serial data of the JTAG Test. The data on TDI is clocked into the device on rising

edges of TCK. This pin has an internal pullup resistor and it can be left disconnected.

G13 IC: Internal Connected

(Leave it open for normal operation.)

H13 IC: Internal Connected

(Leave it open for normal operation.)

Supplies and Grounds

G1 3.3V I/O Power Supply

G14

G4 I/O GND

G11

N4,P4 3.3V / 5V Power Supply for Transmitter Driver

L4,M4 All VDDT pins must be connected to either 3.3V or 5V. It is not allowed to leave any of the VDDT

L11,M11 pins open (not-connected) even if the channel is not used.

N11,P11

A11,B11

C11,D11

C4,D4

A4,B4

N6,P6 Analog GND for Transmitter Driver

L6,M6

L9,M9

N9,P9

A9,B9

C9,D9

C6,D6

A6,B6

H1 3.3V Digital / Analog Core Power Supply

H14

H4 Digital / Analog Core GND

H11

11

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