HSP45116AVC-52Z データシートの表示（PDF） - Intersil
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HSP45116AVC-52Z Datasheet PDF : 19 Pages
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HSP45116A
Pin Descriptions (Continued)
NAME
NUMBER
TYPE
DESCRIPTION
OUTMUX0-1
71, 72
I These inputs select the data to be output on RO0-19 and IO0-19.
OUT OUT
MUX MUX
10
RO16-19
RO0-15
IO16-19
IO0-15
0 0 Real CMAC Real CMAC Imag CMAC Imag CMAC
31-34
15-30
31-34
15-30
0 1 Real CMAC 0, Real
Imag CMAC 0, Imag
31-34
CMAC 0-14 31-34
CMAC 0-14
1 0 Real ACC Real ACC Imag ACC Imag ACC
16-19
0-15
16-19
0-15
1 1 Reserved Reserved Reserved Reserved
RO0-19
IO0-19
DET0-1
84-86, 88-91, 93,
94, 96, 97, 99-101,
103-107, 109
110, 112, 113,
115-118, 121-123,
126-130, 133-137
81, 82
O Real Output Data Bus. R19 is the MSB. These three-state outputs are controlled by OER and
OEREXT. OUTMUX0-1 select the data output on the bus.
O Imaginary Output Data Bus. I19 is the MSB. These three-state outputs are controlled by OEI and
OEIEXT. OUTMUX0-1 select the data output on the bus.
O These output pins indicate the number of bits of growth in the accumulators. While PEAK is low,
these pins indicate the peak growth. The detector examines bits 15-18, real and imaginary
accumulator holding registers and bits 30-33 of the real and imaginary CMAC Holding Registers.
The bits indicate the largest growth of the four registers.
DET 1
0
0
1
1
DET 0
0
1
0
1
NUMBER OF BITS
OF GROWTH ABOVE 2o
0
1
2
3
OER
74
OEREXT
76
OEI
78
OEIEXT
77
RND
75
I Three-state control for bits RO0-15. Outputs are enabled when the line is low.
I Three-state control for bits RO16-19. Outputs are enabled when the line is low.
I Three-state control for bits IO0-15. Outputs are enabled when the line is low.
I Three-state control for bits IO16-19. Outputs are enabled when the line is low.
I Round Enable. This input enables rounding of the output data precision from 9 to 20 bits. This
input is active “low”. This input must be tied either high or low.
6
FN4156.4
May 7, 2007
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