AS1324 データシートの表示（PDF） - austriamicrosystems AG
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AS1324 Datasheet PDF : 21 Pages
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AS1324
Datasheet - Application Information
9.6 Efficiency
The efficiency of a switching regulator is equivalent to:
Efficiency = (POUT/PIN)100%
(EQ 8)
For optimum design, an analysis of the AS1324 is needed to determine efficiency limitations and to determine design changes for improved
efficiency. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
(EQ 9)
Where:
L1, L2, L3, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce losses, those four main sources should be considered for efficiency calculation:
9.6.1 Input Voltage Quiescent Current Losses
The VIN current is the DC supply current given in the electrical characteristics which excludes MOSFET driver and control currents. VIN current
results in a small (<0.1%) loss that increases with VIN, even at no load. The VIN quiescent current loss dominates the efficiency loss at very low
load currents.
9.6.2 I²R Losses
Most of the efficiency loss at medium to high load currents are attributed to I²R loss, and are calculated from the resistances of the internal
switches (RSW) and the external inductor (RL). In continuous mode, the average output current flowing through inductor L is split between the
internal switches. Therefore, the series resistance looking into the SW pin is a function of both NMOS & PMOS RDS(ON) as well as the duty
cycle (DC) and can be calculated as follows:
RSW = (RDS(ON)PMOS)(DC) + (RDS(ON)NMOS)(1 – DC)
(EQ 10)
The RDS(ON) for both MOSFETs can be obtained from the Electrical Characteristics on page 4. Thus, to obtain I²R losses calculate as follows:
I²R losses = IOUT²(RSW + RL)
(EQ 11)
9.6.3 Switching Losses
The switching current is the sum of the control currents and the MOSFET driver. The MOSFET driver current results from switching the gate
capacitance of the power MOSFETs. If a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to
ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC bias current. In continuous mode:
IGC = f(QPMOS + QNMOS)
(EQ 12)
Where: QPMOS and QNMOS are the gate charges of the internal MOSFET switches.
The losses of the gate charges are proportional to VIN and thus their effects will be more visible at higher supply voltages.
9.6.4 Other Losses
Basic losses in the design of a system should also be considered. Internal battery resistances and copper trace can account for additional
efficiency degradations in battery operated systems. By making sure that CIN has adequate charge storage and very low ESR at the given
switching frequency, the internal battery and fuse resistance losses can be minimized. CIN and COUT ESR dissipative losses and inductor core
losses generally account for less than 2% total additional loss.
9.7 Thermal Shutdown
Due to its high-efficiency design, the AS1324 will not dissipate much heat in most applications. However, in applications where the AS1324 is
running at high ambient temperature, uses a low supply voltage, and runs with high duty cycles (such as in dropout) the heat dissipated may
exceed the maximum junction temperature of the device.
As soon as the junction temperature reaches approximately 150ºC the AS1324 goes in thermal shutdown. In this mode the internal PMOS &
NMOS switch are turned off. The device will power up again, as soon as the temperature falls below +145°C again.
9.8 Checking Transient Response
The main loop response can be evaluated by examining the load transient response. Switching regulators normally take several cycles to
respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equivalent to:
VDROP = ∆IOUT x ESR
(EQ 13)
Where:
ESR is the effective series resistance of COUT.
∆IOUT also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its
steady-state value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem.
www.ams.com/DC-DC_Step-Up/AS1324
Revision 1.06
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