MT28S4M16LCTG-10 データシートの表示（PDF） - Micron Technology

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MT28S4M16LCTG-10

SYNCFLASH® MEMORY

Micron Technology 

Operation

BANK/ROW ACTIVATION

Before any READ or WRITE commands can be is-

sued to a bank within the SyncFlash memory, a row in

that bank must be “opened.” (Note: A row will not be

activated for LCR/active/read or LCR/active write com-

mand sequences, see the Flash Memory Architecture

section for additional information). This is accom-

plished via the ACTIVE command, which selects both

the bank and the row to be activated.

After opening a row (issuing an ACTIVE command),

a READ or WRITE command may be issued to that row,

subject to the tRCD specification. tRCD (MIN) should

be divided by the clock period and rounded up to the

next whole number to determine the earliest clock edge

after the ACTIVE command on which a READ or WRITE

command can be entered. For example, a tRCD specifi-

cation of 30ns with a 90 MHz clock (11.11ns period)

results in 2.7 clocks rounded to 3. This is reflected in

Figure 4, which covers any case where 2 < tRCD (MIN)/

tCK ≤ 3 . (The same procedure is used to convert other

specification limits from time units to clock cycles).

A subsequent ACTIVE command to a different row

in the same bank can be issued without having to close

a previous active row, provided the minimum time in-

terval between successive ACTIVE commands to the

same bank is defined by tRC.

A subsequent ACTIVE command to another bank

can be issued while the first bank is being accessed,

which results in a reduction of total row access over-

head. The minimum time interval between successive

ACTIVE commands to different banks is defined by

tRRD.

T0

T1

CLK

COMMAND

ACTIVE

NOP

4 MEG x 16

SYNCFLASH MEMORY

CLK

CKE HIGH

CS#

RAS#

CAS#

WE#

A0–A10

ROW

ADDRESS

BA0, BA1

BANK

ADDRESS

Figure 3

Activating a Specific Row in a

Specific Bank

T2

T3

T4

NOP

READ or WRITE

tRCD

DON’T CARE

Figure 4

Example: Meeting tRCD (MIN) When 2 < tRCD (MIN)/tCK £ 3

4 Meg x 16 SyncFlash

MT28S4M16LC_6.p65 – Rev. 6, Pub. 9/01

14

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2001, Micron Technology, Inc.

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