datasheetbank_Logo
データシート検索エンジンとフリーデータシート
HOME  >>>  System Logic Semiconductor  >>> SL74HC112N PDF

SL74HC112N データシート - System Logic Semiconductor

SL74HC112 image

部品番号
SL74HC112N

コンポーネント説明

Other PDF
  no available.

PDF
DOWNLOAD     

page
6 Pages

File Size
41.6 kB

メーカー
System-Logic
System Logic Semiconductor System-Logic

The SL74HC112 is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs.

● Outputs Directly Interface to CMOS, NMOS, and TTL
● Operating Voltage Range: 2.0 to 6.0 V
● Low Input Current: 1.0 mA
● High Noise Immunity Characteristic of CMOS Devices

Page Link's: 1  2  3  4  5  6 

部品番号
コンポーネント説明
PDF
メーカー
Dual “J-K” Flip-Flop with Set and Reset
Intersil
Dual J-K Flip-Flop with Set and Reset
Motorola => Freescale
Dual J-K Flip-Flop with Set and Reset
IK Semicon Co., Ltd
Dual J-K Flip-Flop with Set and Reset
ON Semiconductor
Dual “J-K” Flip-Flop with Set and Reset
Intersil
Dual J-K Flip-Flop with set and Reset
Kodenshi Auk Co., LTD
Dual J-K Flip-Flop with Set and Reset
Kodenshi Auk Co., LTD
Dual J-K Flip-Flop with Set and Reset
Kodenshi Auk Co., LTD
Dual J-K Flip-Flop with Set and Reset
System Logic Semiconductor
Dual J-K Flip-Flop with Set and Reset
Integral Corp.

Share Link: GO URL

EnglishEnglish Korean한국어 Japanese日本語 Russianрусский Spanishespañol

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]