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MACH435-12 データシート - Lattice Semiconductor

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部品番号
MACH435-12

コンポーネント説明

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30 Pages

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209.1 kB

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Lattice
Lattice Semiconductor Lattice

GENERAL DESCRIPTION
The MACH435 is a member of our high-performance EE CMOS MACH 4 family. This device has approximately twelve times the macrocell capability of the popular PAL22V10, with significant density and functional features that the PAL22V10 does not provide.

DISTINCTIVE CHARACTERISTICS
■ 84 Pins in PLCC
■ 128 Macrocells
■ 12 ns tPD
■ 83.3 MHz fCNT
■ 70 Inputs with pull-up resistors
■ 64 Outputs
■ 192 Flip-flops
    — 128 Macrocell flip-flops
    — 64 Input flip-flops
■ Up to 20 product terms per function, with XOR
■ Flexible clocking
    — Four global clock pins with selectable edges
    — Asynchronous mode available for each macrocell
■ 8 “PAL33V16” blocks
■ Input and output switch matrices for high routability
■ Fixed, predictable, deterministic delays
■ Pin compatible with MACH130, MACH131, MACH230, and MACH231

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部品番号
コンポーネント説明
PDF
メーカー
High-Density EE CMOS Programmable Logic
Lattice Semiconductor
High-Density EE CMOS Programmable Logic
Advanced Micro Devices
High-Density EE CMOS Programmable Logic
Lattice Semiconductor
High-Density EE CMOS Programmable Logic
Lattice Semiconductor
High-Density EE CMOS Programmable Logic
Advanced Micro Devices
High-Density EE CMOS Programmable Logic
Lattice Semiconductor
High-Density EE CMOS Programmable Logic
Advanced Micro Devices
High Density EE CMOS Programmable Logic
Lattice Semiconductor
High-Density EE CMOS Programmable Logic
Lattice Semiconductor
High-Density EE CMOS Programmable Logic
Advanced Micro Devices

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