datasheetbank_Logo
データシート検索エンジンとフリーデータシート
HOME  >>>  Integrated Device Technology  >>> IDTCV122CPV PDF

IDTCV122CPV データシート - Integrated Device Technology

IDTCV122C image

部品番号
IDTCV122CPV

Other PDF
  no available.

PDF
DOWNLOAD     

page
19 Pages

File Size
170.5 kB

メーカー
IDT
Integrated Device Technology IDT

DESCRIPTION:
IDTCV122C is a 56 pin clock device, complying the latest Intel CK410 requirements, for Intel advance P4 processors. The CPU output buffer is designed to support up to 400MHz processor. One dedicated PLL for Serial ATA clock provides high accuracy frequency. This device also implements Band-gap referencedIREF to reduce the impact ofVDD variation on differential outputs, which can provide more robust system performance.
Each CPU/SRC/PCI, SATA clock has its own Spread Spectrum selection, which allows for isolated changes instead of affecting other clock groups.


FEATURES:
• One high precision N Programming PLL for CPU
• One high precision N Programming PLL for SRC/PCI
• One high precision PLL for SATA
• One high precision PLL for 96MHz/48MHz
• Band-gap circuit for differential outputs
• Support multiple spread spectrum modulation, down and center
• Support I2C block read/write, index read/write
• Selectable output strength for REF, PCI, and 48MHz
• Available in SSOP package

 

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 

部品番号
コンポーネント説明
PDF
メーカー
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Integrated Device Technology
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Integrated Device Technology
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Integrated Device Technology
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Integrated Device Technology
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Integrated Device Technology
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
Integrated Device Technology
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
Integrated Device Technology
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
Integrated Device Technology
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
Integrated Device Technology
Programmable Timing Control Hub™ for Next Gen P4™ processor
Integrated Circuit Systems

Share Link: GO URL

EnglishEnglish Korean한국어 Japanese日本語 Russianрусский Spanishespañol

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]