Description
The circuit is a two-stages self biased wide band monolithic low noise amplifier.
The circuit is manufactured with a standard pHEMT process: 0.25µm gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is supplied in chip form.

Main Feature
■< Broad band performance 20-30GHz
■< 2.2dB noise figure
■< 15dB gain, ± 0.5dB gain flatness
■< Low DC power consumption, 50mA
■< 20dBm 3rd order intercept point
■< Chip size : 1.670 x 1.03x 0.1mm