MX9691A データシートの表示（PDF） - Macronix International
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MX9691A Datasheet PDF : 36 Pages
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Control ROM interface :
Symbol
No.
ROMCS#/ 75
FWIN#
ROMWR#/ 76
FDIR
MX9691A
Type
O
O
Description
ROM chip select/Flash memory data buffer enable : In normal mode,
this signal is used as ROM chip enable if firmware that stored in
external ROM. In ICE debugging mode, this signal is used as flash
memory data buffer (74640) enable if firmware that stored in flash
memory array.
ROM write enable/Flash memory data buffer direction control: In
normal mode, this signal is used as ROM write enable if firmware that
stored in external ROM. In ICE debugging mode, this signal is used as
flash memory data buffer (74640) direction control if firmware that stored
in flash memory array.
Miscellaneous :
Symbol
No.
X1
79
X2
78
X32I
71
X32O
70
TEST
81
PWR_RST# 82
LED#
6
VCC
GND
17,45,53,72,
80,105,112
7,25,38,48,
59,69,77,91,
108,120
Type
I
O
I
I
I
I
O
Description
Crystal input.
Crystal ouput.
32K Crystal input.
32K Crystal output.
This signal is used to select the main system clock, either from
external clock source if this signal is high or from internal PLL circuit if
this signal is low. This pin includes an internal pull-up resistor.
Power on reset, CMOS Schmite-triggered: The MX9691A include
debouncing circuit to stabilize internal DSP reset signal.
LED output: This signal is connected to external LED in debugging
system to indicate system status.The LED will be turn-on during reset.
The contorl firmware will turn off the LED after H/W initialization and
pass diagnostics. If system fail, the control firmware will flash the LED
to indicate some error occur. This signal will be high if port 601Ch bit0
set to 1 or OPTR bit2 set to 1.
5 volt or 3.3 volt Power pin
Ground pin
P/N:PM0539
REV. 1.0, OCT. 02, 1998
9
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