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MX9691A データシートの表示(PDF) - Macronix International

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MX9691A
Macronix
Macronix International Macronix
MX9691A Datasheet PDF : 36 Pages
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MX9691A
GENERAL DESCRIPTION
The Macronix's Solid State Disk controller is fully inte-
grated flash memory controller that provides all the con-
trol logic for a PC Card ATA flash memory. The MX9691A
combines 1KB dual-port buffer and buffer manager, inte-
grated MX93011 DSP core , and a complete host inter-
face for both the PC Card ATA and ATA standard.
The MX9691A is typically configured with up to
32MB(unformatted) capacity for 16 pcs. 16Mbit flash
memory or 64MB(unformatted) capacity for 16 pcs.
32Mbit flash memory. The MX9691A supports all the
control signals to execute read/write/erase operation for
flash memory chip.
The MX9691A is fully compliant with the PC Card ATA
specification. It includes 256 bytes of integrated attribute
memory(for the required Card Information Structure) and
four Card Configuration registers. The PCMCIA device
driver can access the MX9691A ATA command block
through four different modes by writing the different modes
by writing the configuration index of the attribute memory
configuration option register.
PIN DESCRIPTION
Host Interface
Symbol
HA[10:0]
HD[15:0]
HOE#,HWE#
IOR#,IOW#
HRESET/
HRESET#
WAIT/
IOCHRDY
RDY/BSY#/
IREQ#/
HOSTINT
No.
Type
92,94, 96-97, I
99,101-103,
106,109,113
84-89,116-117, I/O
121-128
104,111
I
107,110
I
100
I
98
O,OD
119
O,Z
Description
Host address line 10-0.
These pins include internal pull-up resistors.
Host data line 15-0.
These pins include internal bus holder circuit that keep previous state
when tri-state.
Host memory read/write/mode select : Both pins include internal pull-
up resistors that is default in PCMCIA mode.
Host I/O access.
Both pins include internal pull-up resistors.
The host reset signal, when active, initializes the control/status
registers and stops any command in process.In PCMCIA mode, the
signal is active high. In ATA extension mode, this signal is active low.
This signal include internal pull-down resistor.
WAIT or INPUT CHANNEL READY : In both PCMCIA and ATA
extension modes, this signal holds host transfers until the controller is
ready to respond.
READY/BUSY or HOST INTERRUPT : In PCMCIA mode, this signal
has two functions. In PCMCIA common memory mode, this signal is
ready/busy. It is asserted busy by the reset logic, and can be deasserted
by the local uC. In PCMCIA I/O mode, this signal is IREQ#. In ATA
extension mode, this active high signal is HOSTINT, which, when
enable, send an interrupt to the host.
P/N:PM0539
REV. 1.0, OCT. 02, 1998
3

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