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CY7C68033 データシートの表示(PDF) - Cypress Semiconductor

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CY7C68033 Datasheet PDF : 34 Pages
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CY7C68033, CY7C68034
EZ-USB NX2LP-Flex™ Flexible USB
NAND Flash Controller
CY7C68033/CY7C68034 Silicon Features
Certified Compliant for Bus- or Self-powered USB 2.0
Operation (TID# 40490118)
Single-Chip, Integrated USB 2.0 Transceiver and Smart SIE
Ultra Low Power – 43 mA Typical Current Draw in Any Mode
Enhanced 8051 Core
Firmware runs from internal RAM, which is downloaded from
NAND flash at startup
No external EEPROM required
15 KBytes of On-Chip Code/Data RAM
Default NAND firmware ~8 kB
Default free space ~7 kB
Four Programmable BULK/INTERRUPT/ISOCHRONOUS
Endpoints
Buffering options: double, triple, and quad
Additional Programmable (BULK/INTERRUPT) 64-byte
Endpoint
SmartMedia Standard Hardware ECC Generation with 1-bit
Correction and 2-bit Detection
GPIF (General Programmable Interface)
Enables direct connection to most parallel interfaces
Programmable waveform descriptors and configuration
registers to define waveforms
Supports multiple Ready (RDY) inputs and Control (CTL)
outputs
12 Fully Programmable GPIO Pins
Integrated, Industry-standard Enhanced 8051
48 MHz, 24 MHz, or 12 MHz CPU operation
Four clocks per instruction cycle
Three counter/timers
Expanded interrupt system
Two data pointers
3.3V Operation with 5V Tolerant Inputs
Vectored USB Interrupts and GPIF/FIFO Interrupts
Separate Data Buffers for the Setup and Data portions of a
CONTROL Transfer
Integrated I2C Controller, Runs at 100 or 400 kHz
Four Integrated FIFOs
Integrated glue logic and FIFOs lower system cost
Automatic conversion to and from 16-bit buses
Master or slave operation
Uses external clock or asynchronous strobes
Easy interface to ASIC and DSP ICs
Available in Space Saving, 56-pin QFN Package
CY7C68034 Only Silicon Features:
Ideal for Battery Powered Applications
Suspend current: 100 μA (typ)
CY7C68033 Only Silicon Features:
Ideal for Non-battery Powered Applications
Suspend current: 300 μA (typ)
Logic Block Diagram 24 MHz
Ext. Xtal
NX2LP-Flex
High-performance,
enhanced 8051 core
with low power options
Connected for
full speed USB
/0.5
x20 /1.0
PLL /2.0
VCC
1.5k
8051 Core
12/24/48 MHz,
four clocks/cycle
NAND
Boot Logic
(ROM)
D+
D–
Integrated full- and
high speed XCVR
USB
2.0
XCVR
CY
Smart
USB
1.1/2.0
Engine
15 kB
RAM
I2C
Master
Additional I/Os
ECC
GPIF
RDY (2)
CTL (3)
4 kB
8/16
FIFO
General Programmable
I/F to ASIC/DSP or bus
standards such as 8-bit
NAND, EPP, and so on.
Up to 96 MB/s burst rate
Enhanced USB core
simplifies 8051 code
‘Soft Configuration’ enables
easy firmware changes
FIFO and USB endpoint memory
(master or slave modes)
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-04247 Rev *F
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 03, 2009
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