ML7033 データシートの表示（PDF） - LAPIS Semiconductor Co., Ltd.
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ML7033 Datasheet PDF : 52 Pages
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FEDL7033-04
ML7033
MCU Serial Interface
DEN
EXCK
t2
t5
1
2
3
4
5
6
t1 t3
t4
t6
t7
13 14
t9
t10
15
t12
DIO
(Write)
DIO
(Read)
SLIC Interface
DEN
W
A4 A3 A2 A1 A0
t8
R
A4 A3 A2 A1 A0
Figure 5 MCU Serial Interface
B1 B0
t11
B1 B0
EXCK
13 14 15 16
t20
SLIC_I/F *5
t21
E0_n
*5 SLIC_I/F = F2_n pin, F1_n pin, F0_n, SWCn pin, BSELn pin
Figure 6 SLIC Interface 1 (to SLIC)
ALMn, DETn
INT (from ALMn)
INT (from DETn)
Either ALMn pin or DETn pin,or
DEN pin (CR6 and CR13)
t22
t23
t23
t24
Figure 7 SLIC Interface 2 (from SLIC)
* The INT pin driven to a logic “1” in either of the following cases;
(1) (PDN pin = logic “1”) Any of the ALMn or DETn pins (maximum 4 pins concerned) in a logic “0”
state go to logic “1”.
(2) (PDN pin = logic “0”) All of the ALMn or DETn pins (maximum 4 pins concerned) in a logic “0”
state go to logic “1”.
(3) Both SLIC 1 control (CR6) and SLIC 2 control (CR13) are read by the MCU.
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