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XRT83VSH38 データシートの表示(PDF) - Exar Corporation

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XRT83VSH38 Datasheet PDF : 76 Pages
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XRT83VSH38
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
TRANSMIT SECTION
REV. 1.0.7
SIGNAL NAME
BGA
LEAD #
TCLKE/µPTS2 L15
TTIP0
E3
TTIP1
G4
TTIP2
F17
TTIP3
C16
TTIP4
R2
TTIP5
N2
TTIP6
N16
TTIP7
P16
TRING0
E2
TRING1
F3
TRING2
F15
TRING3
E16
TRING4
P2
TRING5
N4
TRING6
R15
TRING7
P17
TPOS0
C5
TPOS1
A4
TPOS2
B14
TPOS3
D14
TPOS4
V4
TPOS5
U5
TPOS6
V15
TPOS7
T14
TNEG0
C4
TNEG1
B5
TNEG2
D13
TNEG3
B15
TNEG4
U4
TNEG5
V5
TNEG6
U14
TNEG7
R14
TYPE
DESCRIPTION
I Transmit Clock Edge
Hardware Mode
This pin is used to select which edge of the transmit clock is used to sample data
on the transmitter on the TPOS/TNEG inputs. By default, data is sampled on the
falling edge. To sample data on the rising edge, this pin must be pulled "High".
Host Mode
µPTS[2:1] pins are used to select the type of microprocessor to be used for Host
communication.
"00" = 8051 Intel Asynchronous
"01" = 68K Motorola Asynchronous
NOTE: This pin is internally pulled “Low” with a 50kresistor.
O Transmit Differential Tip Output
TTIP is the positive differential output to the line interface. Along with the TRING
signal, these pins should be coupled to a 1:2 step up transformer for proper opera-
tion.
O Transmit Differential Ring Output
TRING is the negative differential output to the line interface. Along with the TTIP
signal, these pins should be coupled to a 1:2 step up transformer for proper opera-
tion.
I TPOS/TDATA Input
Transmit digital input pin. In dual rail mode, this pin is the transmit positive data
input. In single rail mode, this pin is the transmit non-return to zero (NRZ) data
input.
NOTE: Internally pulled "Low" with a 50Kresistor.
I Transmitter Negative NRZ Data Input
In dual rail mode, this signal is the negative-rail input data for the transmitter. In
single rail mode, this pin can be left unconnected while in Host mode. However, in
Hardware mode, this pin is used to select the type of encoding/decoding for the E1/
T1 data format. Connecting this pin “Low” enables HDB3 in E1 or B8ZS in T1.
Connecting this pin “High” selects AMI data format.
NOTE: Internally pulled “Low” with a 50kresistor.
7

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