AD7824 データシートの表示（PDF） - Analog Devices

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AD7824

LC2MOS High Speed 4- and 8-Channel 8-Bit ADCs

Analog Devices 

AD7824/AD7828

OPERATIONAL DIAGRAM

The AD7824 is a 4-channel 8-bit ADC and the AD7828 is an

8-channel 8-bit ADC. Operational diagrams for both of these

devices are shown in Figures 3 and 4. The addition of just a 5 V

reference allows the devices to perform the analog-to-digital function.

ANALOG INPUTS

0V TO 5V

␮P 4LSB

DATA BUS

␮P CONTROL INPUT

STATUS OUTPUT

1 AIN4

2 AIN3

VDD 24

NC 23

3 AIN2

A0 22

4 AIN1

A1 21

AD7824

5 NC

DB7 20

6 DB0

DB6 19

7 DB1

DB5 18

8 DB2

DB4 17

9 DB3

10 RD

CS 16

RDY 15

11 INT

12 GND

VREF (+) 14

VREF (–) 13

5V

␮P ADDRESS

BUS

␮P 4MSB

DATA BUS

␮P CONTROL INPUT

STATUS OUTPUT

5V

NC = NO CONNECT

Figure 3. AD7824 Operational Diagram

ANALOG INPUTS

0V TO 5V

␮P 4LSB

DATA BUS

␮P CONTROL INPUT

STATUS OUTPUT

1 AIN6

AIN7 28

2 AIN5

AIN8 27

3 AIN4

4 AIN3

VDD 26

A0 25

5 AIN2

A1 24

6 AIN1

A2 23

AD7828

7 NC

DB7 22

8 DB0

DB6 21

9 DB1

DB5 20

10 DB2

DB4 19

11 DB3

CS 18

12 RD

RDY 17

13 INT

14 GND

VREF (+) 16

VREF (–) 15

NC = NO CONNECT

ANALOG INPUTS

0V TO 5V

5V

␮P ADDRESS

BUS

␮P 4MSB

DATA BUS

␮P CONTROL INPUT

STATUS OUTPUT

5V

Figure 4. AD7828 Operational Diagram

CIRCUIT INFORMATION

BASIC DESCRIPTION

The AD7824/AD7828 uses a half-flash conversion technique

whereby two 4-bit flash ADCs are used to achieve an 8-bit result.

Each 4-bit flash ADC contains 15 comparators that compare

the unknown input to a reference ladder to get a 4-bit result.

For a full 8-bit reading to be realized, the upper 4-bit flash, the

most significant (MS) flash, performs a conversion to provide

the four most significant data bits. An internal DAC, driven by

the four MSBs, then recreates an analog approximation of the

input voltage. This analog result is subtracted from the input,

and the difference is converted by the lower flash ADC, the least

significant (LS) flash, to provide the four least significant bits of

the output data. The most significant flash ADC also has one

additional comparator to detect overrange on the analog input.

APPLYING THE AD7824/AD7828

REFERENCE AND INPUT

The two reference inputs on the AD7824/AD7828 are fully differ-

ential and define the zero to full-scale input range of the ADC.

As a result, the span of the analog input voltage for all channels

can easily be varied. By reducing the reference span, VREF (+) to

VREF (–), to less than 5 V, the sensitivity of the converter can be

increased (e.g., if VREF = 2 V then 1 LSB = 7.8 mV). The input/

reference arrangement also facilitates ratiometric operation.

This reference flexibility also allows the input channel voltage

span to be offset from zero. The voltage at VREF (–) sets the

input level for all channels, which produces a digital output of

all zeroes. Therefore, although the analog inputs are not them-

selves differential, they have nearly differential input capability

in most measurement applications because of the reference

design. Figures 5 to 7 show some of the configurations that are

possible.

VIN (+)

VIN (–)

5V

0.1␮F

47␮F

AIN1

GND AD7824*

AD7828*

VDD

VREF (+)

VREF (–)

*ADDITIONAL PINS OMITTED FOR CLARITY.

ONLY CHANNEL 1 SHOWN.

Figure 5. Power Supply as Reference

VIN (+)

VIN (–)

5V

0.1␮F

47␮F

AD580

10␮F

AIN1

GND AD7824*

AD7828*

VDD

VREF (+)

0.1␮F

VREF (–)

*ADDITIONAL PINS OMITTED FOR CLARITY.

ONLY CHANNEL 1 SHOWN.

Figure 6. External Reference Using the AD580, Full-Scale

Input is 2.5 V

VIN (+)

5V

0.1␮F

47␮F

V1

V2

AIN1

GND AD7824*

AD7828*

VDD

VREF (+)

DB7

DATA

VREF (–)

DB0

*ADDITIONAL PINS OMITTED FOR CLARITY.

ONLY CHANNEL 1 SHOWN.

DATA =

VIN (+)

V1 – V2

؋ 256

(FOR

ALL

CHANNELS)

Figure 7. Input Not Referenced to GND

–6–

REV. F

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