NJU3101 データシートの表示（PDF） - Japan Radio Corporation

部品番号

コンポーネント説明

一致するリスト

NJU3101

4-BIT SINGLE CHIP TINY CONTROLLER

Japan Radio Corporation  

NJU3101

s INPUT OUTPUT PORT

The NJU3101 prepares 10 Input-Output lines maximum for the interface to an external application circuit.

All lines are assigned to each Peripheral Register, and are shared to five groups which are PORTA, PORTB,

PORTC, PORTD, and PORTE.

Data reading operation from the peripheral register can input the actual signal through the input terminal.

Data writing operation to the peripheral register can output the actual signal through the output terminal. All

terminals can select the direction of input or output of each PORT by the mask option.(refer !INPUT OUTPUT

TERMINAL TYPE)

[The read conditions from the assigned peripheral register as output]

Port / PHYn

Output Terminal Types

A / PHY1

B / PHY2

C / PHY3

D / PHY4

E / PHY5

C-MOS Output

N-channel FET OPEN-DRAIN Output With

Pull-Up Resistance

N-channel FET OPEN-DRAIN Output

N-channel FET OPEN-DRAIN Output With

Pull-Up Resistance

N-channel FET OPEN-DRAIN Output

C-MOS Output

C-MOS Output

Read Data of Peripheral

Register

b3 b2 b1 b0

** * *

00 0 *

00 0 1

00 0 *

00 0 1

00 * *

00 * *

* : Output Terminal data

(1) INPUT OUTPUT PORT

• PORTA(PA0−PA3)

PORTA is a 4-bit input-output PORT. When the PORT is set as the output, the signal is output through

the output terminal by writing data to the PORTA register(PHY1). When the PORT is set as the input, the

external signal is gotten directly through the input terminal by reading data from PHY1.

[READING PORTA INPUT DATA (PHY1)]

(MSB) 3

2

1

0

PHY1 PA3 PA2 PA1 PA0

(LSB)

[WRITING PORTA OUTPUT DATA (PHY1)]

PORTA Input Data

(MSB) 3

2

1

0 (LSB)

PHY1 PA3 PA2 PA1 PA0

PORTA Output Data

-8-

Share Link: