NJU3101 データシートの表示（PDF） - Japan Radio Corporation

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NJU3101

4-BIT SINGLE CHIP TINY CONTROLLER

Japan Radio Corporation  

NJU3101

(2) INPUT OUTPUT PORT OPERATION

a) The output operation example

PA0 and PA1 of PORTA output “H”, and PA2 and PA3 of PORTA output “L”.

SRPC

LDI

LDI

TAP

:

:

Y,1

A,%0011

:

:

;

;PHY1 is pointed

;"0011" is stored into Accumulator

;DATA in Accumulator is transmitted to PHY1

b) The input operation example

Accumulator gets the input data from PORTD and the bit of the edge detector is reset

:

:

SRPC

LDI

Y,4

TPA

TAP

:

:

;

;PHY4 is pointed

;The input data from PHY4 is transferred to Accumulator

;The bit(b2) of the edge detector is reset

The signal from PD0 terminal is stored into the bit0(b0) of Accumulator, the signal from PD1 terminal is

stored into the bit1(b1) of Accumulator, the sign of the edge detector from PD1 terminal is stored into the

bit2(b2) of Accumulator, and “zero” is stored into the bit3(b3) of Accumulator.

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