ADM1014 データシートの表示（PDF） - Analog Devices
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ADM1014 Datasheet PDF : 12 Pages
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PRELIMINARY TECHNICAL DATA
ADM1014
PIN FUNCTION DESCRIPTION
Pin Mnemonic Function
1
M12VOA
Switched -12V output for channel A. Rated for 100mA.
2
M12VGA
Gate of channel A internal NMOS transistor. A capacitor connected from this pin to -12VOA (pin 1)
sets the start-up ramp for the +12V supply. During turn-on, this capacitor is charged from a 25µA
current source.
3
PWRONA Power on control for channel A. 3.3V CMOS-compatible logic input controls all four main supplies.
PWRONA high = outputs on, PWRONA low = outputs off.
4
FLTNA
Active-low, 5V compatible, Open Drain fault output for channel A. A pull-up resistor connects the
pin to 3.3VAux. 4.7k⍀ is recommended for this function. An optional capacitor may be connected
from this pin to GND to provide improved immunity to power supply transients.
5
FAUXA
Active-low, 3.3V compatible, Open Drain fault output for Aux channel A. The same pull-up resistor
as that on FLTNA connects the pin to 3.3VAux.
6
OCSET
Overcurrent set for all 10 outputs. A resistor connected from this pin to ground sets the overcurrent
trip point of all eight supplies. All eight overcurrent trip-points can be programmed by changing the
value of this resistor. The default value of 6.04k⍀, ±1% is compatible with the maximum currents
allowed by the PCI specification.
7
AUXGA
Gate of channel A +3.3VAUX internal PMOS transistor. A capacitor connected from this pin to
AUXOA (pin 8) sets the start-up ramp for the +3.3VAUX supply. During turn-on, this capacitor is
charged from a 25µA current source.
8
AUXOA
Switched 3.3V auxiliary output for channel A. Rated for 0.375A.
9
12VGA
Gate of channel A internal PMOS transistor. A capacitor connected from this pin to 12VOA (pin 10)
sets the start-up ramp for the +12V supply. During turn-on, this capacitor is charged from a 25µA
current source. The undervoltage circuitry is disabled when the voltage on 12VGA rises above 1.2V.
If the capacitor on pin 7 (AUXGA) or pin 33 (3V5VGA) is more than 25% larger than the capacitor on
pin 9 (12VGA) a false undervoltage condition may be detected during startup.
10
12VOA
Switched 12V output for channel A. Rated for 0.5A.
11
12VOB
Switched 12V output for channel B. Rated for 0.5A.
12
12VGB
Gate of channel B internal PMOS transistor. A capacitor connected from this pin to 12VOB (pin 11)
sets the start-up ramp for the +12V supply. During turn-on, this capacitor is charged from a 25µA
current source. The undervoltage circuitry is disabled when the voltage on 12VGB rises above 1.2V.
If the capacitor on the pin 25 (3V5VGB) or pin 14 (AUXGB) is more than 25% larger than the
capacitor on pin 12 (12VGB) a false undervoltage condition may be detected during startup.
13
AUXOB
Switched 3.3V auxiliary output for channel B. Rated for 0.375A.
14
AUXGB
Gate of channel B +3.3VAUX internal PMOS transistor. A capacitor connected from this pin to
AUXOB (pin 13) sets the start-up ramp for the +3.3VAUX supply. During turn-on, this capacitor is
charged from a 25µA current source.
15
FAUXB
Active-low, 3.3V compatible, Open Drain fault output for Aux channel B. The same pull-up resistor
as that on FLTNA connects the pin to 3.3VAux.
16
FLTNB
Active-low, 5V compatible, Open Drain fault output for channel B. A pull-up resistor connects the
pin to 3.3VAux. 4.7k⍀ is recommended for this function. An optional capacitor may be connected
from this pin to GND to provide improved immunity to power supply transients.
17
PWRONB Power on control for channel B. 3.3V CMOS-compatible logic input controls all four main supplies.
PWRONB high = outputs on, PWRONB low = outputs off.
18
M12VGB
Gate of channel B internal NMOS transistor. A capacitor connected from this pin to -12VOB (pin 19)
sets the start-up ramp for the +12V supply. During turn-on, this capacitor is charged from a 25µA
current source.
19
M12VOB
Switched -12V output for channel B. Rated for 100mA.
REV. PrN 1/02
–5–
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