AD12400 データシートの表示（PDF） - Analog Devices

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AD12400

12-Bit, 400 MSPS A/D Converter

Analog Devices 

AD12400

SPECIFICATIONS

DC SPECIFICATIONS

VA = 3.8 V, VC = 3.3 V, VD = 1.5 V, encode = 400 MSPS, 0°C ≤ TCASE ≤ 60°C, unless otherwise noted.

Table 1.

AD12400JWS

AD12400KWS

Parameter

Case Temp Test Level Min

Typ

Max Min

Typ

Max

RESOLUTION

12

12

ACCURACY

No Missing Codes

Full

IV

Guaranteed

Guaranteed

Offset Error

Full

I

−12

+12 −12

+12

Gain Error @ 10 MHz

Full

I

−10

+10 −10

+10

Differential Nonlinearity (DNL) 60°C

V

0.3

0.3

Integral Nonlinearity (INL)

60°C

V

0.5

0.5

TEMPERATURE DRIFT

Gain Error

60°C

V

0.02

0.02

ANALOG INPUT (AIN)

Full-Scale Input Voltage Range 60°C

V

3.2

3.2

Frequency Range

Full

IV

10

180 10

180

Flatness (10 MHz to 180 MHz)

Full

IV

0.5

1

0.5

1

Input VSWR (50 Ω)

60°C

V

1.5

1.5

(10 MHz to 180 MHz)

Analog Input Bandwidth

60°C

V

450

450

POWER SUPPLY1

Supply Voltage

VA

Full

IV

3.6

3.8

3.6

3.8

VC

Full

IV

3.2

3.4

3.2

3.4

VD

Supply Current

Full

IV

1.475

1.575 1.475

1.575

IVA (VA = 3.8 V)

IVC (VC = 3.3 V)

IVD (VD = 1.5 V)

Total Power Dissipation

ENCODE INPUTS2

Full

I

Full

I

Full

I

Full

I

0.95

1.11

400

500

1.4

2.0

7.0

8.5

0.95

1.11

400

500

1.4

2.0

7.0

8.5

Differential Inputs (ENC, ENC)

Input Voltage Range

Full

IV

0.4

0.4

Input Resistance

60°C

V

100

100

Input Capacitance

60°C

V

4

4

Common-Mode Voltage

60°C

V

±3

±3

Single-Ended Inputs (ENC)

Input Voltage

Full

IV

0.4 2

2.5

0.4 2

2.5

Input Resistance

60°C

V

50

50

LOGIC INPUTS (RESET)3

Logic 1 Voltage

Full

IV

2.0

2.0

Logic 0 Voltage

Full

IV

0.8

0.8

Source IIH

60°C

V

10

10

Source IIL

60°C

V

1

1

LOGIC OUTPUTS

(DRA, DRB, Output Bits)4

Differential Output Voltage

Full

IV

247

454 247

454

Output Drive Current

Full

IV

−4

+4

−4

+4

Output Common-Mode Voltage Full

IV

1.125

1.375 1.125

1.375

Start-Up Time

Full

IV

600

600

Unit

Bits

LSB

%FS

LSB

LSB

%/°C

V p-p

MHz

dB

MHz

V

V

V

A

mA

A

W

V

Ω

pF

V

V p-p

Ω

V

V

μA

mA

mV

mA

V

ms

1 Tested using input frequency of 70 MHz. See Figure 17 for VD current vs. input frequency.

2 All ac specifications tested by driving ENC single-ended.

3 Refer to Table 5 for logic convention on all logic inputs.

4 Digital output logic levels: VC = 3.3 V, CLOAD = 8 pF. 3.3 V LVDS, R1 = 100 Ω.

Rev. A | Page 3 of 24

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