UPD72862 データシートの表示（PDF） - NEC => Renesas Technology
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UPD72862 Datasheet PDF : 36 Pages
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µPD72862
3. SERIAL ROM INTERFACE
The µPD72862 provides a serial ROM interface to initialize the 1394 Global Unique ID Register and the
PCI/Cardbus Mode Configuration registers from a serial EEPROM.
3.1 Serial EEPROM Register
Register Address
Register Name
R/W
Base address + 0x930
SUBID register
R/W
Base address + 0x934
LATVAL register
R/W
Base address + 0x938
W_GUIDHi register
R/W
Base address + 0x93C
W_GUIDLo register
R/W
Base address + 0x940
Parameters Write register
R/W
Base address + 0x95C
W_GENERAL register
R/W
Base address + 0x960
W_PHYS register
R/W
Base address + 0x984
W_CIS register
R/W
Remark Base address : Base Address 0 in Configuration register
3.2 Serial EEPROM Register Description
(1) SUBID register (Base address + 0x930)
31
16 15
0
W_SUBSYSID
W_SUBVNDID
Field
W_SUBSYSID
W_SUBVNDID
Bits
31-16
15-0
R/W
R/W
R/W
Default value
Description
0063H
Subsystem ID value. The value is loaded into Subsystem ID register in
Configuration register (offset+2CH bit 31-16).
1033H
Subsystem Vendor ID value. The value is loaded into Subsystem Vendor ID
register in Configuration register (Offset+2CH bit 15-0).
(2) LATVAL register (Base address + 0x934)
31
24 23
16 15
12 11 10
W_MAXLAT
W_MINGNT
-0-
1
-0-
43
0
W_MAX_REC
Field
W_MAXLAT
W_MINGNT
-
W_MAX_REC
Bits
31-24
23-16
15-12
11
10-4
3-0
R/W
R/W
R/W
-
-
-
R/W
Default value
Description
00H
Max Latency value. The value is loaded into Max Latency register in
Configuration register (Offset+3CH bit 31-24).
00H
Min Grant value. The value is loaded into Min Grant register in Configuration
register (Offset+3CH bit 23-16).
-
Reserved. Write 0 to these bits.
-
Reserved. Write 1 to this bit.
-
Reserved. Write 0 to these bits.
9H
MAX__REC value. The value is loaded into the max_rec field of OHCI
BusOption register in OHCI register (Offset+020H bit 15-12).
Data Sheet S14265EJ2V0DS00
21
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