UPD72852 データシートの表示（PDF） - NEC => Renesas Technology

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UPD72852

IEEE1394a-2000 COMPLIANT 400 Mbps TWO-PORT PHY LSI

NEC => Renesas Technology 

µPD72852

Figure 3-3. Isolation Barrier Circuits

(a) CTL0, CTL1, D0-Dn Isolation Barrier Circuit

Link

LinkVDD

Required when LinkVDD is 5 V

DVDD

µPD72852

5 kΩ

100 Ω

5.6 kΩ

0.001 µF

5 kΩ

0.001 µF

4.7 kΩ

300 Ω

LinkGND LinkGND

GND

(b) Link-on Isolation Barrier Circuit

Link

LinkVDD

100 Ω

5 kΩ

µPD72852

0.01 µF

1.6 kΩ

LinkGND

(c) LPS Isolation Barrier Circuit

Link

DVDD

5 kΩ

0.033 µF

1.6 kΩ

100 Ω

µPD72852

GND

(d) LREQ Isolation Barrier Circuit

Link

LinkVDD

Required when LinkVDD is 5 V

DVDD

µPD72852

5 kΩ

100 Ω

5.6 kΩ

0.001 µF

5 kΩ

0.001 µF

4.7 kΩ

300 Ω

LinkGND LinkGND

GND

(e) SCLK Isolation Barrier Circuit

Link

LinkVDD

5 kΩ

DVDD

5 kΩ

µPD72852

0.001 µF

5 kΩ

LinkGND

5 kΩ

GND

The Operating range of the power supply voltage is between 3.0 V and 3.45 V.

Please refer to IEEE1394a-2000 [5A.8.4].

16

Data Sheet S14920EJ3V0DS

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