UPD72873 データシートの表示（PDF） - NEC => Renesas Technology

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UPD72873

IEEE1394 OHCI 1.1 COMPLIANT 2PORT PHY-LINK 1-CHIP HOST CONTROLLER

NEC => Renesas Technology 

µPD72873

1. PIN FUNCTIONS

1.1 PCI/Cardbus Interface Signals: (52 pins)

Name

I/O

Pin No.

IOL

Volts(V)

Function

PAR

I/O 44

PCI/Cardbus 5/3.3 Parity is even parity across AD0 to AD31 and CBE0

to CBE3. It is an input when AD0 to AD31 is an

input; it is an output when AD0 to AD31 is an output.

AD0 to AD31 I/O 9, 10, 12, 13,

15 to 18, 23, 24,

PCI/Cardbus 5/3.3 PCI Multiplexed Address and Data

26 to 29. 32. 33.

47to 50, 52, 53,

55, 56, 58, 59, 62,

63, 65 to 68

CBE0 to

CBE3

I/O 21, 34, 45, 57

-

5/3.3 Command/Byte Enables are multiplexed bus

commands & byte enables.

FRAME

I/O 35

PCI/Cardbus

5/3.3

Frame is asserted by the initiator to indicate the

cycle beginning and is kept asserted during the

burst cycle. If Cardbus mode (CARD_ON = 1), this

pin should be pulled up to VDD.

TRDY

I/O 37

PCI/Cardbus 5/3.3 Target Ready indicates that the current data phase

of the transaction is ready to be completed.

IRDY

I/O 36

PCI/Cardbus

5/3.3

Initiator Ready indicates that the current bus

master is ready to complete the current data phase.

During a write, its assertion indicates that the

initiator is driving valid data onto the data bus.

During a read, its assertion indicates that the

initiator is ready to accept data from the currently-

addressed target.

REQ

O8

PCI/Cardbus 5/3.3 Bus_master Request indicates to the bus arbiter

that this device wants to become a bus master.

GNT

I7

-

5/3.3 Bus_master Grant indicates to this device that

access to the bus has been granted.

IDSEL

I 22

-

5/3.3 Initialization Device Select is used as chip select

for configuration read/write transaction during the

phase of device initialization. If Cardbus mode

(CARD_ON = 1), this pin should be pulled up to VDD.

DEVSEL

I/O 39

PCI/Cardbus

5/3.3

Device Select when actively driven, indicates that

the driving device has decoded its address as the

target of the current access.

STOP

I/O 40

PCI/Cardbus

5/3.3

PCI Stop when actively driven, indicates that the

target is requesting the current bus master to stop

the transaction.

PME

O3

PCI/Cardbus 5/3.3 PME Output for power management event.

Remark *: If the Link pin is pulled up, it should be connected to L_VDD.

(1/2)

Block *

Link

Link

Link

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Link

Link

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8

Preliminary Data Sheet S15305EJ2V0DS

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