STP21NM60ND データシートの表示（PDF） - STMicroelectronics

部品番号

コンポーネント説明

一致するリスト

STP21NM60ND

N-channel 600 V, 0.17 Ω, 17 A FDmesh™ II Power MOSFET D2PAK, I2PAK, TO-220FP, TO-220, TO-247

STMicroelectronics 

Electrical characteristics STP/F21NM60ND - STB21NM60ND - STI21NM60ND - STW21NM60ND

2

Electrical characteristics

4/18

(TCASE=25°C unless otherwise specified)

Table 5. On/off states

Symbol

Parameter

Test conditions

Value

Unit

Min. Typ. Max.

Drain-source

V(BR)DSS breakdown voltage

ID = 1 mA, VGS = 0

600

V

dv/dt(1)

Drain source voltage slope

VDD= 480 V, ID= 17 A,

VGS= 10 V

48

V/ns

IDSS

Zero gate voltage

drain current (VGS = 0)

VDS = Max rating

VDS = Max rating @125 °C

1 µA

100 µA

IGSS

Gate-body leakage

current (VDS = 0)

VGS = ± 20 V

100 nA

VGS(th) Gate threshold voltage

VDS = VGS, ID = 250 µA

3

4

5

V

RDS(on) Static drain-source on

resistance

VGS = 10 V, ID = 8.5 A

0.170 0.220 Ω

1. Characteristic value at turn off on inductive load

Table 6. Dynamic

Symbol

Parameter

Test conditions

Min. Typ. Max. Unit

gfs (1)

Ciss

Coss

Crss

Forward transconductance

Input capacitance

Output capacitance

Reverse transfer

capacitance

VDS = 15 V, ID = 8 A

VDS = 50 V, f = 1 MHz,

VGS = 0

12

S

1800

pF

90

pF

8

pF

Coss

(2)

eq.

Equivalent output

capacitance

VGS = 0, VDS = 0 to 480 V

300

pF

td(on) Turn-on delay time

VDD =300 V, ID = 8.5 A

18

ns

tr

Rise time

RG = 4.7 Ω, VGS = 10 V

16

ns

td(off) Turn-off delay time

(see Figure 23),

70

ns

tf

Fall time

(see Figure 18)

48

ns

Qg Total gate charge

Qgs Gate-source charge

Qgd Gate-drain charge

VDD = 480 V, ID = 17 A,

VGS = 10 V,

(see Figure 19)

60

nC

10

nC

30

nC

f=1 MHz Gate DC Bias=0

Rg Gate input resistance

Test signal level=20 mV

3

Ω

Open drain

1. Pulsed: pulse duration=300 µs, duty cycle 1.5%

2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS

increases from 0 to 80% VDSS

Share Link: