SS6620 データシートの表示（PDF） - Silicon Standard Corp.

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SS6620

High Efficiency Synchronous Step-Up DC/DC Converter

Silicon Standard Corp. 

n BLOCK DIAGRAM

SS6620/21/2

SHDN

CLSEL

LBO

LBI

Minimum Off-Time

One Shot

F/F

SQ

R

One Shot

Maximum On-Time

+

+

OUT

+

Q1

Damping

0.1µ F

Switch

R1

Q3

BATT 200Ω

Q2

LX

L

1

47µF

GND

+

Mirror

OUT

C3

220µF

VIN

+ C1

100µF

Ref erence Voltage

FB

REF

C4

0.1µ F

n PIN DESCRIPTIONS

SS6620/ SS6621

PIN 1: FB- Connect to OUT for +3.3V output.

Use a resistor network to set the out-

put voltage from +1.8V to +4.0V.

PIN 2: LBI- Low-battery comparator input. Inter-

nally set to trip at +1.23V.

PIN 3: LBO- Open-drain low battery comparator

output. Output is low when VLBI is

<1.23V. LBO is high impedance dur-

ing shutdown.

PIN 4: REF- 1.23V reference voltage. Bypass with

a 0.1µF capacitor.

PIN 5: SHDN- Shutdown input. High=operating,

low=shutdown.

PIN 6: GND- Ground

PIN 7: LX- N-channel and P-channel power

MOSFET drain.

PIN 8: OUT- Power output. OUT provides boot-

strap power to the IC.

Rev.2.01 6/06/2003

www.SiliconStandard.com

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