OM6206 データシートの表示（PDF） - Philips Electronics

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OM6206

65 × 102 pixels matrix LCD driver

Philips Electronics 

Philips Semiconductors

65 × 102 pixels matrix LCD driver

Product specification

OM6206

7.7 Addressing

Data is downloaded in bytes into the RAM matrix of

OM6206 as indicated in Figs.3, 4, 5 and 6.

The display RAM has a matrix of 65 × 102 bits. The

columns are addressed by the address pointer. The

address ranges are: X from 0 to 101 (1100101)

and Y from 0 to 8 (1000). Addresses outside these ranges

are not allowed.

In vertical addressing mode (bit V = 1) the Y-address

increments after each byte (see Fig.6).

After the last Y-address (Y = 8) Y wraps

around to 0 and X increments to address the next column.

In horizontal addressing mode (bit V = 0) the X-address

increments after each byte (see Fig.5). After the last

X-address (X = 101) X wraps around to 0 and

Y increments to address the next row.

After the very last address (X = 101, Y = 8) the address

pointers wrap around to address X = 0, Y = 0.

7.7.1 DATA STRUCTURE

handbook, full pagLeSwiBdth

MSB

LSB

0

MSB

X - address

Fig.4 RAM format, addressing.

0

Y-address

8

101

MGT862

2001 Nov 14

9

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