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NJU3505L データシートの表示(PDF) - Japan Radio Corporation

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NJU3505L
JRC
Japan Radio Corporation  JRC
NJU3505L Datasheet PDF : 64 Pages
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NJU3505
PORTJ(PJ0, PJ1)
PORTJ is a 2-bit input PORT. It operates also as VREF and ADCK terminals of the internal A/D
converter by the mask option. When the PORTJ is set as the input PORT, the two external signals are
gotten directly through the input terminals by reading data from PHY26.
[ READING PORTJ INPUT DATA (PHY26) ]
(MSB) 3
PHY26
“0”
2
1
0 (LSB)
“0” PJ1 PJ0
PORTJ Input Data
PORTK(PK0, PK1)
PORTK is a 2-bit input PORT. It operates also as EXTI input terminal for the external interrupt input
and CNTI terminal for the event counter external clock input by the mask option. When the PORTK is set
as the input PORT, the two external signals are gotten directly from the input terminals by reading data from
PHY27.
[ READING PORTK INPUT DATA (PHY27) ]
(MSB) 3
PHY27 “0”
2
1
0 (LSB)
“0” PK1 PK0
PORTK Input Data
PORTL(PL0, PL1)
PORTL is a 2-bit input-output PORT. It operates also as SDO and SDI(O) terminals for the 8-bit serial
interface by the mask option. When the PORTL is selected as the input-output PORT, PL0 is fixed as the
output and PL1 can be selected as the input or the output by the mask option. When the PORTL is
selected as the output, the two signals are output through the output terminals to the external circuit by
writing data to the PORTL register(PHY28). When PL1 is selected as the input, the external signal is
gotten directly through the input terminal by reading data from PHY28.
[ READING PORTL INPUT DATA (PHY28) ]
(MSB) 3
PHY28 “0”
2
1
“0” PL1
0 (LSB)
PL0 monitor
PORTL Input Data
When PL0 is output, its output condition can be monitored.
[ WRITING PORTL OUTPUT DATA (PHY28) ]
(MSB) 3
PHY28
2
1
0 (LSB)
PL1 PL0
PORTL Output Data
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