MSM7731-02 データシートの表示（PDF） - Oki Electric Industry

部品番号

コンポーネント説明

一致するリスト

MSM7731-02

Dual Echo Canceler & Noise Canceler with Dual Codec for Hands-Free

Oki Electric Industry 

1Semiconductor

FEDL7731-02-04

MSM7731-02

ECSEL

This is the echo canceler mode selection pin. A logic “1” selects the single echo canceler mode and a logic “0”

selects the dual echo canceler mode. If the pin setting is changed, reset must be activated by either the PDN/RST

pin or the PDN/RST bit (CR0-B7). If the single echo canceler mode is selected, echo canceler control on the

line-side is unnecessary. This pin is ORed with the CR0-B0 bit of the control register. Refer to the section

“RELATIONSHIP BETWEEN PINS AND CONTROL REGISTERS”.

LTHR/ATHR

This is the “through mode” control pin for the echo canceler. In the “through mode”, SinL/A and RinL/A data is

directly output to SoutL/A and RoutL/A respectively while each respective echo coefficient is maintained. A logic

“0” selects the normal mode (echo canceler operation) and a logic “1” selects the “through mode”. In the through

mode, the functions of HD, HLD, ATT and GC are invalid. Because data is shifted into this pin in synchronization

with the rising edge of the SYNC signal, hold the data at the pin for 250 µs or longer. This pin is ORed with the

CR4-B7 and CR5-B7 bits of the control register. Refer to the section “RELATIONSHIP BETWEEN PINS AND

CONTROL REGISTERS”.

LHD/AHD

This pin turns ON or OFF the function to detect and cancel the howling that occurs in an acoustic system such as a

handsfree communication system. A logic “0” turns the function ON and a logic “1” turns the function OFF. This

function is valid when the LTHR/ATHR pin is in the normal mode. Because data is shifted into this pin in

synchronization with the rising edge of the SYNC signal, hold the data at the pin for 250 µs or longer. This pin is

ORed with the CR4-B4 and CR4-B4 and CR5-B4 bits of the control register. Refer to the section

“RELATIONSHIP BETWEEN PINS AND CONTROL REGISTERS”.

LATT

This pin turns ON or OFF the ATT function to prevent howling by means of attenuators (ATTsL, ATTrL)

provided in the RinL inputs and SoutL outputs of the echo canceler. A logic “0” turns ON and a logic “1” turns

OFF the ATT function. If input is only to RinL, the ATTsL for SoutL is activated. If input is only to SinL, or if

there is input to both SinL and RinL, the ATTrL for RinL input is activated. The ATT value of each attenuator is

approximately 6 dB. This function is valid when the LTHR pin is in the normal mode. Because data is shifted into

this pin in synchronization with the rising edge of the SYNC signal, hold the data at the pin for 250 µs or longer.

This pin setting is logically ORed with the CR4-B1 bit of the control register. Refer to the section

“RELATIONSHIP BETWEEN PINS AND CONTROL REGISTERS”.

AATT

This is the ATT atlenuation selection pin to prevent howling by means of attenuators (ATTsA, ATTrA) provided

in the RinA inputs and SoutA outputs of the echo canceler. A logic “0” selects 6 dB and a logic “1” selects 12 dB.

If input is only to RinA, the ATTsA for SoutA is activated. If input is only to SinA, or if there is input to both SinA

and RinA, the ATTrA for RinA input is activated. This function is valid when the ATHR pin is in the normal mode.

Because data is shifted into this pin in synchronization with the rising edge of the SYNC signal, hold the data at the

pin for 250 µs or longer. This pin setting is logically ORed with the CR5-B1 bit of the control register. Refer to the

section “RELATIONSHIP BETWEEN PINS AND CONTROL REGISTERS”.

9/53

Share Link: